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Preprocessing method using redundancy metal filling for realizing layout density uniformity

A redundant metal and layout density technology, which is applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problem of uneven metal line density on the layout, and achieve the effect of global density

Active Publication Date: 2011-07-06
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

[0009] In order to solve the problem of non-uniform metal line density on the layout after layout and wiring, the present invention proposes a preprocessing method for achieving uniform layout density with redundant metal filling, wherein the method includes:

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  • Preprocessing method using redundancy metal filling for realizing layout density uniformity
  • Preprocessing method using redundancy metal filling for realizing layout density uniformity
  • Preprocessing method using redundancy metal filling for realizing layout density uniformity

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Embodiment Construction

[0026] The technical solutions of the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0027] see Figure 5 , an embodiment of the present invention provides a preprocessing method for achieving layout density uniformity by using redundant metal filling, including the following steps:

[0028] Step 1: Set the preset block density lower limit Dl, and the preset allowable density fluctuation value ΔD;

[0029] Step 2: Grid the layout and divide it into m×n small blocks Tij(m, n are all integers greater than 1, 1figure 1 ;

[0030] Step 3: Use the CMP simulation tool to calculate the density of each block, which is recorded as Dij (1<=i<=m, 1<=j<=n);

[0031] Step 4: Determine whether there is a block with a density lower than the preset block density lower limit Dl, if so, adjust the block density to Dl, which is recorded as Nij, see figure 2 ;

[0032] Step 5: Starting from the first block on the ...

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Abstract

The invention relates to a preprocessing method using redundancy metal filling for realizing layout density uniformity, belonging to the technical field of integrated circuit manufacturing process and layout design. The method can determine the density of each block by a design rule check rule through a pre-setting the block density lower limit and pre-setting the allowable density undulating quantity and then dividing the layout into blocks having the same size. For the method, the density of each block is adjusted to be above the density lower limit, and then the density difference between each block and the adjacent blocks is limited within the preset allowable undulating quantity range, so that the density difference among different blocks is reduced, the uniformity of the metal wire density on the layout is improved, better smoothness is realized and chip quality is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing technology and layout design, in particular to a pretreatment method for realizing uniform layout density by using redundant metal filling. Background technique [0002] Typically, the fabrication of integrated circuits involves a series of layering processes in which metals, electrolytes, and other materials are applied to the surface of silicon wafers to form layered interconnect structures. An integrated circuit usually includes multiple layers of circuits with multiple metal lines between each layer of circuits passing through multiple layers connected by metal-filled vias. Therefore, a critical step in the manufacturing process is to form the interconnect structure that connects the various layers of the integrated circuit, making the integrated circuit have high complexity and circuit density. [0003] According to Moore's Law, the integrated circuit manufacturing t...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50H01L21/768
Inventor 周隽雄陈岚阮文彪李志刚杨飞王强叶甜春
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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