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Data transmission method, PCIE system, equipment and storage medium

A data transmission method and data technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of large influence and time jitter of the host computer, and achieve the effect of avoiding time jitter

Pending Publication Date: 2021-05-07
COMBA TELECOM SYST CHINA LTD
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Problems solved by technology

[0004] However, the host computer in the PCIe architecture usually has time jitter at the microsecond level. In related technologies, the data transmission of the PCIe architecture depends on the control signal sent by the host computer. Therefore, the time jitter of the host computer will be introduced during the data transmission process. Some data services, especially those in 5G communications, have a greater impact

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  • Data transmission method, PCIE system, equipment and storage medium
  • Data transmission method, PCIE system, equipment and storage medium
  • Data transmission method, PCIE system, equipment and storage medium

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Embodiment Construction

[0060] In order to make the purpose, technical solution and advantages of the present application clearer, the implementation manners of the present application will be further described in detail below in conjunction with the accompanying drawings.

[0061] PCIe (English: peripheral component interconnect express) is a high-speed serial computer expansion bus standard.

[0062] Please refer to figure 1 , which shows a schematic diagram of a typical PCIe architecture, as figure 1 As shown, the PCIe architecture may include an upper computer 00 , a lower computer 01 , a main memory 03 , a root component 04 and a switch 05 . Among them, the upper computer 00, the main memory 03 and the switch 05 are all connected to the root component 04, and the lower computer 01 is connected to the switch 05. The main memory 03 is used to store the data of the upper computer 00, the upper computer 00 can access the main memory 03 through the root component 04, and at the same time, the lower...

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Abstract

The invention discloses a data transmission method, a PCIE system, equipment and a storage medium, and belongs to the technical field of computer equipment. The method comprises the steps that a lower computer periodically sends synchronization information to an upper computer, wherein each piece of synchronization information indicates different first uplink cache spaces and different second uplink cache spaces; in response to the i-th synchronization information, the lower computer stores the uplink data in a second uplink cache space indicated by the i-th synchronization information, and sends the uplink data stored in the second uplink cache space indicated by the (i-1)-th synchronization information to the first uplink cache space indicated by the i-th synchronization information; in response to the i-th synchronization information, the upper computer reads uplink data from the first uplink cache space indicated by the (i-1)-th synchronization information. According to the technical scheme provided by the embodiment of the invention, introduction of time jitter of the upper computer in data transmission of the upper computer and the lower computer can be avoided.

Description

technical field [0001] The present application relates to the technical field of computer equipment, in particular to a data transmission method, PCIE system, equipment and storage medium. Background technique [0002] PCIe (English: peripheral component interconnect express) is a high-speed serial computer expansion bus standard. A typical PCIe architecture includes an upper computer, a lower computer (English: endpoint) and a main memory (English: main memory), among which the upper computer can be a CPU (English: central processing unit; Chinese: central processing unit), and the lower computer can be It is an FPGA (English: Field Programmable Gate Array) chip, and the main memory can be used to store the data of the upper computer. Usually, data transmission can be performed between the upper computer and the lower computer in the PCIe architecture. For example, the lower computer can transmit data to the upper computer, and the upper computer can transmit data to the l...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16G06F13/42G06F13/28
CPCG06F13/1673G06F13/1689G06F13/4282G06F13/28G06F2213/0026
Inventor 杨子刘永钦王子豪
Owner COMBA TELECOM SYST CHINA LTD
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