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Multi-core security chip processor based on logic expansion and processing method thereof

A security chip and processing method technology, applied in the direction of electrical digital data processing, instruments, multi-programming devices, etc., can solve problems such as nuclear idleness, low efficiency of information security operations, and poor accuracy of operations

Active Publication Date: 2021-03-19
ZHEJIANG GEOFORCECHIP TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The structure of each processor core of isomorphic multi-core is exactly the same, and the status is equal. However, as the information calculation becomes more and more complex, the complexity and difficulty of each core may be different, which will cause some cores to be idle and some cores to be overloaded. , resulting in low efficiency of information security calculation and poor calculation accuracy

Method used

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  • Multi-core security chip processor based on logic expansion and processing method thereof
  • Multi-core security chip processor based on logic expansion and processing method thereof
  • Multi-core security chip processor based on logic expansion and processing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0047] refer to figure 1 , a multi-core security chip processor based on logic expansion, including a main processor core and multiple heterogeneous slave processor cores, the main processor core includes a signal acquisition module, an organization module and an allocation scheduling module; the signal acquisition module uses To obtain externally transmitted control signals in real time, the organization module is used to dynamically organize multiple slave processor cores according to the operation logic of the safety operation to form a dynamic execution architecture that matches the operation logic of the safety operation; The operation logic of the safety operation decomposes the safety operation into multiple operation tasks, and assigns the operation tasks to the corresponding slave processor cores under the above dynamic execution architecture, and coordinates the operation tasks among multiple slave processor cores; The slave processor cores are respectively used to r...

Embodiment 2

[0056] refer to Figure 4 , a method for processing a multi-core security chip based on logic expansion, comprising the following steps:

[0057] S101: Obtain externally transmitted control signals in real time; specifically, the main processor checks that the logical organization of multiple slave processor cores is dynamic, and each externally transmitted control signal can include different safety operation logics, which can be executed according to each The security operation logic is used to reorganize the execution architecture of multiple slave processor cores to realize dynamic organization.

[0058] S102: Dynamically organize multiple slave processor cores according to the operation logic of the safety operation to form a dynamic execution architecture matching the operation logic of the safety operation; specifically, the main processor core and the plurality of slave processor cores are used for Undertake the computing tasks of the security chip processor, and the ...

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Abstract

The invention provides a multi-core security chip processor based on logic expansion and a processing method thereof. The processor comprises a master processor core and a plurality of slave processorcores, and the master processor core comprises a signal acquisition module, an organization module and a distribution scheduling module; the signal acquisition module is used for acquiring externallytransmitted control signals in real time, and the organization module is used for performing dynamic logic organization on the plurality of slave processor cores according to the security operation logic to form a dynamic execution architecture matched with the security operation logic; the distribution scheduling module is used for decomposing the security operation into a plurality of operationtasks according to the security operation logic, distributing the operation tasks to the corresponding slave processor cores under the dynamic execution architecture, and cooperatively scheduling theoperation tasks among the plurality of slave processor cores; and the plurality of slave processor cores are respectively used for running the operation tasks allocated and scheduled by the master processor core. The method has the advantages of being high in safety operation efficiency, accurate in operation result, balanced in inter-core load, capable of improving the performance of the multi-core processor and the like.

Description

technical field [0001] The invention relates to the technical field of processors, in particular to a logic extension-based multi-core security chip processor and a processing method thereof. Background technique [0002] With the rapid development of Internet technology, the importance of information security is increasing day by day. In order to ensure the security of information data, it is necessary to ensure the security of the processor used to transmit and receive information data. Therefore, the security processor has become the basic component of modern information security interaction and is a key technology in the field of information security. An important way to address information system security threats, risks, and vulnerabilities. Security processors are closely related to information security, involving many protection technologies such as physical security, logical security, application security, and controllable security, such as electromagnetic protectio...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50G06F15/167G06F21/71
CPCG06F9/5027G06F15/167G06F21/71
Inventor 不公告发明人
Owner ZHEJIANG GEOFORCECHIP TECH CO LTD
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