Semiconductor tester communication bus system

A technology of communication bus and testing machine, which is applied in the field of high-bandwidth and strong real-time semiconductor testing machine communication bus system, can solve the problems that the transmission bus cannot guarantee the delay and accuracy of data transmission, and cannot guarantee high-precision synchronization requirements, etc., to meet the requirements of Strong real-time access requirements, improve system load capacity, and meet large-scale effects

Active Publication Date: 2021-01-26
杭州加速科技有限公司
View PDF16 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the transmission bus cannot guarantee the definite delay and accuracy of data transmission, the high-precision synchronization requirements cannot be guaranteed during the semiconductor chip / wafer testing process
Such a test machine can only test low-end, low-speed semiconductor products / wafer products

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor tester communication bus system
  • Semiconductor tester communication bus system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0029] Such as figure 1 In the shown embodiment of the present invention, the semiconductor testing machine communication bus system of the present invention is shown, including a main control computer connected through an interface bus and more than one test resource board, the main control computer is used to run a specific test program, control Each test resource board outputs excitation signals to the semiconductor chip / wafer to be tested and measures the feedback signal of the semiconductor chip / wafer to be tested, and determines the quality of the chip / wafer by judging the consistency between the feedback signal and the expected result. The central processing unit of the main control computer is connected to a high-performance FPGA switching...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a communication bus system of a semiconductor testing machine. The communication bus system comprises a main control computer and at least one testing resource board card whichare connected through an interface bus, wherein a central processing unit of the main control computer is connected with an FPGA exchange chip, and a physical transmission link used for data interaction is established between the FPGA exchange chip and each test resource board card. The communication bus system of the semiconductor testing machine has high bandwidth, strong real-time performanceand high load capacity, can meet requirements for exchange and transmission of a large amount of data in the semiconductor chip / wafer testing process, improves testing efficiency and reduces testing cost.

Description

technical field [0001] The invention relates to the field of communication bus technology, in particular to a high-bandwidth and strong real-time semiconductor testing machine communication bus system. Background technique [0002] Semiconductor automated testing equipment is an automated equipment that uses test machine resources to test the electrical parameters and logic functions of semiconductor chips / wafers to determine the quality and level of chips according to IC testing requirements. A semiconductor automated test system is generally composed of a main control computer, a test machine, a test resource board and an interface board of the chip to be tested, which are connected together by means of an interface bus. The user runs a specific test program on the main control computer, controls the resource board of the test machine to output the excitation signal of the chip to be tested and measures the feedback signal of the chip to be tested, and determines whether t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/40H04L12/26G01R31/28
CPCH04L12/40006H04L43/50G01R31/2851
Inventor 邬刚凌云
Owner 杭州加速科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products