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Three-dimensional packaged semiconductor structure

A three-dimensional packaging and semiconductor technology, which is applied in the direction of semiconductor devices, semiconductor/solid-state device parts, electric solid-state devices, etc., can solve problems such as damage and overheating of dies, and achieve local overheating, effective heat dissipation, and uniform heat distribution Effect

Active Publication Date: 2020-10-30
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The heat dissipated by the underlying wafer (Wafer) or chip (Chip) or die (Die) may cause the upper wafer or chip or die to overheat and be damaged

Method used

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Embodiment Construction

[0022] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0023] In the following description, many specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways than those described here, so the present invention is not limited by the specific embodiments disclosed below.

[0024] As indicated in this application and claims, the terms "a", "an", "an" and / or "the" do not refer to the singular and may include the plural unless the context clearly indicates an exception. Generally speaking, the terms "comprising" and "comprising" only suggest the inclusion of clearly identified steps and elements, and these steps and elements do not constitute an exclusive list, and the method or device may also contain other st...

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Abstract

The invention relates to a three-dimensional packaged semiconductor structure. The three-dimensional packaged semiconductor structure comprises a first semiconductor structure and a second semiconductor structure which are bonded with each other, wherein the first semiconductor structure comprises a first substrate, one or more logic devices arranged on the first substrate, a first bonding surfacelocated above the one or more logic devices, a first through hole structure penetrating through the one or more logic devices, and first micro-channels distributed in the first substrate, the secondsemiconductor structure comprises a second substrate, one or more memory devices arranged on the second substrate, a second bonding surface located above the one or more memory devices, a second through hole structure penetrating through the one or more memory devices, and second micro-channels distributed in the second substrate, and the first semiconductor structure and the second semiconductorstructure are bonded with each other through the first bonding surface and the second bonding surface. The semiconductor structure can effectively dissipate heat.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a three-dimensional packaged semiconductor structure with heat dissipation microchannels and heat dissipation through hole structures. Background technique [0002] In the integrated circuit manufacturing industry, with the gradual improvement of circuit integration, three-dimensional packaging technology (3D-IC) has broken through the traditional concept of planar packaging, allowing multiple chips to be stacked in a single package, achieving a doubling of storage capacity , also known as stacked 3D packaging. Three-dimensional packaging technology has the advantages of low power consumption and high speed, which greatly reduces the size and weight of electronic information products. However, during the three-dimensional packaging process, a large amount of heat generated due to multi-layer chip stacking is accumulated inside the chip. The heat dissipated by the underlying wafer ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L25/07H01L23/367H01L23/46
CPCH01L23/367H01L23/46H01L25/071
Inventor 刘峻
Owner YANGTZE MEMORY TECH CO LTD
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