Packaging patch positioning method

Abstract

The invention provides a packaging paster positioning method, and the method comprises the steps: dividing a carrier plate into a plurality of mounting regions and blank regions, and the blank regionsbeing arranged around the mounting regions; setting a positioning identifier in the blank area; and mounting chips to be packaged on the mounting areas in a manner of corresponding to the positioningidentifiers, wherein the chips to be packaged are in one-to-one correspondence with the mounting areas. According to the invention, the positioning identifier is arranged in the blank area of the carrier plate, the accurate position of the to-be-packaged patch on the carrier plate is positioned through the positioning identifier, the chip mounting precision in the chip mounting process can be ensured, and the chip mounting precision can be detected according to the position of the positioning identifier, so that the mounting position of the to-be-packaged chip can be adjusted in real time, and meanwhile, the precision production requirements of subsequent processes can be met, thereby ensuring the success rate of later packaging and the yield of products.

Description

technical field [0001] The present application relates to the technical field of semiconductors, and in particular to a packaging patch positioning method. Background technique [0002] Common semiconductor packaging technology, such as chip packaging technology, mainly includes the following process: first, a layer of film is pasted on the carrier, and the film can be degraded by heating or laser. The front side of the bare chip is bonded to the carrier board, heat-pressed and molded, then the carrier board is peeled off, and then a rewiring process is performed on the front side of the bare chip to form a rewiring structure and packaged. [0003] Such as figure 1 As shown, when the die 1 is mounted on the carrier board 2, since there is no reference point on the carrier board 2, the position of the die 1 cannot be accurately positioned, and the mounting accuracy of the die 1 cannot be measured after mounting , so that in the subsequent rewiring process, it is difficult t...

AI Technical Summary

Problems solved by technology

[0003] like figure 1 As shown, when the die 1 is mounted on the carrier board 2, since there is no reference point on the carrier board 2, the position of the die 1 cannot be accurately positioned, and the mounting accuracy of the die 1 cannot be measured after mounting , so that in the subsequent rewiring process, it is difficult to locate the precise position of the die 1 in the carrier 2, which has a great impact on the rewiring process, and even makes it difficult to carry out the rewiring process

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