Physical memory isolation method based on RISC-V instruction architecture

Abstract

The invention provides a physical memory isolation method based on an RISC-V instruction architecture. According to the method, on the basis of an existing PMP (physical memory isolation) technology capable of being configured by a Machine mode of an RISC-V instruction architecture, an sPMP (physical memory isolation) technology capable of being configured by a Supervisor mode is added; the physical memory isolation technology sPMP depends on a plurality of groups of sPMP registers which can only be read and written by a Machine mode program and a Supervisor mode program. According to the invention, the limitation of the number of security applications of the existing TEE system based on the PMP register set is broken through, and the characteristics of efficient security application starting, efficient security application communication, fine-grained security application memory resource allocation and the like can be provided. Compared with the existing TEE design, the safety and theexpandability of the system are greatly improved.

Description

technical field [0001] The invention relates to the security field of application programs, in particular to a physical memory isolation method based on RISC-V instruction architecture. In particular, it relates to an operating system privilege level physical memory isolation hardware technology (Supervisor-mode Physical Memory Protection) based on the RISC-V instruction set architecture and a system and method for providing a trusted execution environment by combining software and hardware. Background technique [0002] RISC-V instruction set architecture: RISC-V architecture is an open source instruction set architecture based on the principle of reduced instruction set (RISC) first proposed by the University of California, Berkeley in 2010. Different from common commercial instruction set architectures such as X86 and ARM, RISC-V, as an open source instruction set architecture, can be freely and freely applied to any purpose and scenario, allowing developers or chip manuf...

AI Technical Summary

Problems solved by technology

Due to the limited number of static divisions of physical memory intervals, Sanctum, like Keystone, has the problem of limited TEE programs supported at the same time.

At the same time, the design of Sanctum and Keystone did not take into account the problem that there is no hardware support for page table translation in IoT devices, which means that the operating system kernel cannot limit the user's memory access interval through the page table, that is, the memory access interval of any user program It does not need to go through the conversion of virtual address to physical address, and can directly use the physical address to access the code and data of any other program or even the operating system

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