Chip package structure semi-finished product, module, and fabrication method of chip package structure semi-finished product

Abstract

The invention provides a chip package structure semi-finished product, a module, and a fabrication method of a chip package structure semi-finished product. According to the invention, a plurality ofconductive terminals are positioned by a positioning shell to be synchronously arranged, so that the arrangement time of the conductive terminals is reduced, and then, the positioning shell is removedto expose the top lap joint parts of the conductive terminals to be electrically connected with a preset circuit substrate or an electronic assembly. The chip package structure module can quickly form a plurality of chip package structures in a cutting mode, so that the manufacturing process of the chip package structures is simplified, and the yield of products is increased.

Description

technical field [0001] The invention relates to an integrated circuit packaging process, in particular to a chip packaging structure semi-finished product, a chip packaging structure module and a manufacturing method of the chip packaging structure. Background technique [0002] In the traditional IC packaging process, the number of conductive terminals is large, which makes the layout of the conductive terminals very cumbersome. It is often necessary to deploy a machine to send each conductive terminal to the circuit substrate one by one for welding, resulting in a long time for the layout of the conductive terminals and lowering the manufacturing cost. stay high. [0003] Therefore, in the IC packaging process, how to reduce the difficulty of laying the conductive terminals and solve the problem of long laying time of the conductive terminals has become a technical issue that the industry is eager to challenge and overcome. Contents of the invention [0004] In view of ...

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Problems solved by technology

[0002] In the traditional IC packaging process, the number of conductive terminals is large, which makes the layout of the conductive terminals very cumbersome. It is often necessary to deploy a machine to send each conductive terminal to the circuit substrate one by one for welding, resulting in a long time for the layout of the conductive terminals and lowering the manufacturing cost. stay high

[0003] Therefore, in the IC packaging process, how to reduce the difficulty of laying conductive terminals and solve the problems of long laying time of conductive terminals has become a technical issue that the industry is eager to challenge and overcome.

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