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A cpu, an electronic device and a cpu cache control method

A caching and read-write control technology, which is applied in memory systems, electrical digital data processing, memory architecture access/allocation, etc., can solve problems such as low CPU performance efficiency, wasted cache space, and insufficient cache space, so as to improve the hit rate, The effect of increasing cache space and reducing cache space

Active Publication Date: 2021-10-15
INSPUR SUZHOU INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In practical applications, when the system needs to be used in various scenarios, if the cache space of the CPU used is small, the cache space will be insufficient during use, which will cause low CPU performance efficiency; Directly select a CPU with a large cache space, but in practical applications when a large-capacity cache is not needed most of the time, it will be a waste of cache space

Method used

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  • A cpu, an electronic device and a cpu cache control method
  • A cpu, an electronic device and a cpu cache control method
  • A cpu, an electronic device and a cpu cache control method

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Embodiment Construction

[0029] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0030] The core of the embodiment of the present invention is to provide a CPU, which can not only improve the hit rate of the CPU cache space, but also avoid the waste of the cache space; another core of the present invention is to provide an electronic device and a CPU cache control method , all have the above-mentioned beneficial effects.

[0031] In order to enable those skilled in the art to better understand the solution of the present invention, the pre...

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Abstract

The present application discloses a CPU, which includes a CPU body, and further includes: a second processor interconnection interface for detachable connection with the first processor interconnection interface of the CPU body; connected with the second processor interconnection interface, for providing The bus protocol module of the bus protocol; the cache read-write control module connected with the bus protocol module for controlling the read-write operation; the cache memory used for cache data information connected with the cache read-write control module. The CPU provided by this application can increase or decrease the cache space according to actual needs, and can conveniently and flexibly adjust the cache space of the CPU. On the one hand, it can improve the hit rate of the CPU cache space, thereby improving the work efficiency of the CPU and improving system performance; on the other hand, A waste of cache space can be avoided. The application also discloses an electronic device and a CPU cache control method, both of which have the above beneficial effects.

Description

technical field [0001] The invention relates to the field of chip control, in particular to a CPU, an electronic device and a CPU cache control method. Background technique [0002] In recent years, with the rapid development of computer technology, the requirements for CPU performance are getting higher and higher. The performance of the CPU affects the performance of the entire system, and the size of the cache space of the CPU affects the performance of the CPU. During the chip design process, the size of the cache space of the CPU is determined by the size of the cache space set in the cache memory of the CPU. In practical applications, when the system needs to be used in various scenarios, if the cache space of the CPU used is small, the cache space will be insufficient during use, which will cause low CPU performance efficiency; Directly select a CPU with a large cache space, but in practical applications when a large-capacity cache is not needed most of the time, it...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/0862G06F12/0893G06F13/16
CPCG06F12/0862G06F12/0893G06F13/1668G06F2212/1021G06F2212/1044
Inventor 李拓
Owner INSPUR SUZHOU INTELLIGENT TECH CO LTD
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