Dynamic Comparator and Electronics

Abstract

The present invention provides a dynamic comparator, comprising: a clock signal module for generating a first clock signal, a second clock signal and a third clock signal; a positive feedback channel connected to a pre-amplifier and a positive feedback latch respectively, when the first When the three clock signals are at low level, the voltage difference between the two node voltages Tp and Tn connected between the pre-amplifier and the positive feedback latch is raised; when the first and second clock signals are at low level, the node voltage Tp and Tn are pulled up to the power supply voltage to enter the reset state and output high level, which is obtained as low level Ip and In feedback control pre-amplifier after inversion processing; when the first clock signal is high level, the second clock signal is still It is low level, the pre-amplifier is in the working state to amplify the input signal and output the node voltage Tp and Tn with voltage difference, when the second clock signal becomes high level, the voltage difference between the node voltage Tp and Tn makes the positive feedback latch The device enters the latch state and completes the comparison work to output voltage signals Dp and Dn.

Description

technical field [0001] The invention belongs to the technical field of analog or digital-analog mixed integrated circuits, in particular to a high-speed low-kickback noise dynamic comparator and electronic equipment. Background technique [0002] In recent years, with the continuous development of integrated circuit manufacturing technology, the feature size of CMOS devices has been continuously reduced, and the operating voltage of integrated circuits has also been continuously reduced. Under the deep submicron process, the working speed of analog-to-digital converters has been greatly improved. Improve, at the same time, power consumption is further reduced. However, as the core component of the analog-to-digital converter, the performance of the comparator has become a bottleneck in the design of high-speed and low-power consumption. Several traditional comparator structures are difficult to meet the requirements of speed, power consumption, low power supply voltage and ...

AI Technical Summary

Problems solved by technology

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a dynamic comparator, which is used to solve the problem that the dynamic comparator in the prior art cannot guarantee less kickback noise and power consumption at a high comparison speed. question

Images