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Memory and method of forming the same

A memory and storage area technology, applied in semiconductor devices, electric solid state devices, electrical components, etc., can solve the problems of low production efficiency and complex process, and achieve the effect of simplifying and reducing the process flow

Active Publication Date: 2020-08-25
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, in the prior art, multiple patterning processes are required in the formation process of the flash memory, the process is complex, and the production efficiency is low

Method used

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  • Memory and method of forming the same

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Experimental program
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Embodiment Construction

[0027] As mentioned in the background, prior art memories have poor performance.

[0028] A memory, comprising: a substrate, the substrate includes an erasing area and a floating gate area, the floating gate area is adjacent to the erasing area and located on both sides of the erasing area; In addition to the gate structure; the floating gate structure respectively located on the floating gate region of the substrate; the first side wall, the second side wall and the control gate structure located on the floating gate structure, the second side wall is located on the control gate structure On the gate structure, the first sidewall is parallel to the second sidewall and the control gate structure.

[0029] In the formation process of the above-mentioned memory, one mask is required to form the erasing gate structure, the control gate structure and the floating gate structure, so at least three patterning processes are required. When continuing to form the word line structure c...

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Abstract

A memory and its formation method. The method includes: providing a substrate. The substrate includes an erasure area, a floating gate area and a word line bit line area arranged along a first direction. The floating gate area is located on both sides of the erasure area, and the word line area is arranged along a first direction. The line bit line area is located on both sides of the erase area and the floating gate area; a floating gate structure film and a dielectric layer located on the floating gate structure film are formed on the substrate, and the floating gate area and word line are exposed in the dielectric layer The first opening of the floating gate structure film in the bit line area; forming a first spacer on the sidewall of the first opening; forming a control gate film at the bottom of the first opening; forming a second spacer on the sidewall of the first spacer ; Remove the control gate film and floating gate structure film exposed by the first sidewall, the second sidewall and the dielectric layer to form a floating gate structure layer, a control gate layer and a second opening; remove the dielectric on the erased area layer and a floating gate structure layer to form a third opening and a floating gate structure; an erasure gate structure is formed in the third opening. The method improves memory production efficiency.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a memory and a forming method thereof. Background technique [0002] Flash memory is an important device in integrated circuit products. The main feature of flash memory is that it can keep stored information for a long time without applying voltage. Flash memory has the advantages of high integration, fast access speed and easy erasing, so it is widely used. [0003] Flash memory is classified into two types: stack gate flash memory and split gate flash memory. The stacked gate flash memory has a floating gate and a control gate above the floating gate. The stacked gate flash memory has the problem of over-erasing. Different from the stacked gate flash memory, the split gate flash memory forms a word line as an erasing gate on one side of the floating gate. The split-gate flash memory can effectively avoid the over-erasing effect. [0004] However, in the prior a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11521H01L21/28H01L29/423H10B41/30
Inventor 李冰寒
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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