Hardware realization system and method of video display stream compression coding

A compression coding and video display technology, applied in the fields of digital video signal modification, electrical components, image communication, etc., can solve the problem of low compression rate of DSC algorithm, and achieve the benefits of system running speed, processing speed, and critical path delay. Effect

Inactive Publication Date: 2019-04-12
SOUTHEAST UNIV
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Problems solved by technology

[0005] The technical problem to be solved by the present invention is that, aiming at the problem of low compression rate of the current software-based DSC algorithm, the present invention proposes a hardware implementation system and method for video display stream compression coding, so as to effectively improve the execution efficiency when compressing images, Thus effectively reducing the time consumed by compression

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  • Hardware realization system and method of video display stream compression coding
  • Hardware realization system and method of video display stream compression coding
  • Hardware realization system and method of video display stream compression coding

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Embodiment Construction

[0047] Embodiments of the present invention will be described below in conjunction with the accompanying drawings.

[0048] Such as figure 1 As shown, the present invention designs a hardware implementation system of video display stream compression encoding, and the hardware implementation system of the DSC encoding mainly includes: a color space conversion module 101, a data read-in pixel buffer module 102, a control module 103, and a prediction module 104 , quantization module 105, difference reconstruction module 106, color history index module 107, flatness detection module 108, code rate control module 109, entropy coding module 110, line buffer module 111, code stream multiplexing module 112, rate buffer FIFO113.

[0049] Wherein, the color space conversion module 101 is used to receive RGB video source pixels that need to be compressed from the outside, and convert the input video source pixels to be compressed and encoded in RGB format into pixel data in YCoCg format ...

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Abstract

The invention discloses a hardware realization system and method of video display stream compression coding. The method comprises: converting an input RGB format of to-be-carried-out compression coding, and using a result as original pixel data for caching; extracting reconstruction values of predicting needed neighboring pixels, and calculating and obtaining pixel prediction values of a current group; carrying out subtraction on the same and original pixel data to obtain pixel quantization residual values of the current group; obtaining reconstruction values of pixels of the current group according to calculation of the pixel quantization residual values of the current group and the pixel prediction values of the current group; carrying out comparison with the original pixel data according to pre-stored historically-used pixel reconstruction values to obtain pixel reconstruction values and pixel index values under a color history index; storing the reconstruction values; respectivelycoding the pixel quantization residual values and the pixel index values to output entropy coding data, reusing the same as a set of data stream, carrying out caching, carrying out splicing accordingto a storage order, and then carrying out output. The method can effectively improve processing speed of image compression, and retains image compression performance of a DSC coder at the same time.

Description

technical field [0001] The invention relates to a hardware implementation system and method for video display stream compression coding, which belongs to the technical field of image compression coding. Background technique [0002] At present, the display technology is developing rapidly, and the bandwidth requirement of the display link increases proportionally with the increase of the display resolution. However, some display links cannot meet the bandwidth requirements of high-definition displays. Image compression can be performed on pixel data so that lower display link bandwidths can also provide digital video that meets high-definition displays. [0003] The DSC algorithm is an image compression standard formulated by the Video Electronic Standard Association (VESA) and the MIPI Alliance. Compared with other technologies related to video and image coding, DSC solves the link bandwidth between the processor and the display. In terms of problems, it has the advantages...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N19/124H04N19/182H04N19/42H04N19/44H04N19/50H04N19/70H04N19/91
CPCH04N19/124H04N19/182H04N19/42H04N19/44H04N19/50H04N19/70H04N19/91
Inventor 李冰蔡舒亦刘勇张林王亚洲王刚董乾赵霞
Owner SOUTHEAST UNIV
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