Three-dimensional coupler based on silicon through hole and preparation method thereof

A coupler and through-silicon via technology, which is applied in the field of three-dimensional couplers based on through-silicon vias and its preparation, can solve the problem of small space for directional adjustment, difficulties in integrating discrete three-dimensional microwave couplers, and difficulty in improving isolation, etc. question

Active Publication Date: 2019-03-29
XIDIAN UNIV
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  • Summary
  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional planar microwave coupler not only occupies a huge chip area, but also has little room for adjustment of coupling degree, directivity and other indicators, especially the isolation degree is difficult to improve
In addition, discrete three-dimensional microwave couplers based on low-temperature co-fired ceramic technology are difficult to meet the requirements of integration

Method used

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  • Three-dimensional coupler based on silicon through hole and preparation method thereof
  • Three-dimensional coupler based on silicon through hole and preparation method thereof
  • Three-dimensional coupler based on silicon through hole and preparation method thereof

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Embodiment Construction

[0122] As shown in Figure 1, a three-dimensional coupler based on through-silicon vias provided by an embodiment of the present invention includes a top ground layer 108, a top signal line 109, a top dielectric layer 105, a top ground column 107, a top signal line Interconnection columns 106, top and bottom ground layers 104, top and bottom dielectric layers 101, top and bottom signal interconnection columns 103, top and bottom shielding layers 102, upper silicon substrate 201, upper first dielectric layer 202, upper shielding layer 203, upper The second dielectric layer 205, the upper signal interconnection column 204, the first dielectric layer 301 at the top of the middle layer, the shielding layer 302 at the top of the middle layer, the first signal interconnection column 303 at the top of the middle layer, the ground layer 304 at the top of the middle layer, and the top of the middle layer The second dielectric layer 305, the second signal interconnection column 306 at the...

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Abstract

The invention discloses a three-dimensional coupler based on a silicon through hole and a preparation method thereof and relates to the field of a three-dimensional integrated circuit. The method is mainly characterized in that through the silicon through hole three-dimensional integration technology and the multi-joint structure, in combination with the reactive ion corrosion technology, electrochemical deposition, plasma enhanced chemical vapor deposition and chemical vapor deposition methods, interconnection wire length and the chip area are effectively reduced, data transmission bandwidthand the integration degree are improved, purposes of simultaneously improving performance of the integrated circuit, reducing power consumption and reducing weight and volume are achieved, and problems that the chip occupation area is large, the adjustable space of the coupling degree, directionality and other indicators are small, especially the isolation degree is difficult to improve and integration requirements are difficult to meet in the prior art are solved.

Description

technical field [0001] The invention belongs to the field of three-dimensional integrated circuits, and in particular relates to a three-dimensional coupler based on through-silicon holes and a preparation method thereof. Background technique [0002] Three-dimensional integration technology distributes the functional modules of the circuit system on different chips (which can be chips with different functions and different processes), and forms a three-dimensional stack through low-temperature bonding. In a three-dimensional integrated circuit (3-Dimension Integrated Circuit, 3-D IC), the electrical connection between the upper and lower modules is realized through a through-silicon via (TSV), which has a decisive effect on the performance of the entire system. 3-D IC has the advantages of being able to greatly reduce the global interconnect length, increase data transmission bandwidth, reduce chip area, increase integration, and realize chip heterogeneous integration. It c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01P5/16H01P11/00H01L23/528H01L21/768
CPCH01L21/76801H01L21/76838H01L23/528H01L23/5286H01P5/16H01P11/00
Inventor 卢启军朱樟明杨银堂李跃进丁瑞雪
Owner XIDIAN UNIV
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