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Memory access mode protection method based on data redundancy

A memory access and data redundancy technology, which is applied in electrical digital data processing, memory systems, instruments, etc., can solve the problem that it is difficult for attackers to effectively associate access operations, and achieve the effect of reducing communication overhead and avoiding leakage.

Active Publication Date: 2019-01-04
ZHEJIANG UNIV
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Problems solved by technology

This strategy makes it difficult for an attacker to effectively associate access operations

Method used

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  • Memory access mode protection method based on data redundancy

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Embodiment Construction

[0041] The simulation of the invention class runs in the gem5 simulator environment. The simulator provides a full-fidelity simulation environment that can simulate memory access including CPU and memory modules, which is exactly the operation that the present invention aims to protect. It should be noted that the mathematical symbols in the following text have been agreed in the "Content of the Invention" section and will not be described here.

[0042] Such as figure 1 As shown, a data redundancy-based memory access mode protection method specifically includes the following steps:

[0043] S01. First construct a system consisting of a CPU, a first-level cache, a second-level cache, a memory controller (partially inherited from the native cache class) and memory. Wherein the memory controller intercepts the request of the secondary cache between the secondary cache and the memory. At the same time, h hash functions are preset.

[0044] S02. During the initialization proce...

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Abstract

The invention discloses a memory access mode protection method based on data redundancy, which can efficiently and safely confuse the memory access mode, and the confused memory access sequence is difficult to be correlated by an attacker, thereby achieving the goal of safety. The invention adopts the data redundancy technology, dynamically converts each request address and encrypts each data block. At the same time, combined with the position map optimization technology, the invention makes the optimize position map hundreds of times smaller than the traditional position map, and can effectively protect the 4GB memory only require a few megabytes of on-chip cache. The invention has the advantages of high safety, high speed, hardware compatibility and the like, which are not possessed by the prior methods, and is helpful for popularizing in practice.

Description

technical field [0001] The invention relates to the field of memory security, in particular to a data redundancy-based memory access mode protection method. Background technique [0002] For a long time, memory access pattern (memory access pattern) has been used for side-channel attack (Side-channel attack, also known as side-channel attack, side-channel attack). Specifically, a memory access pattern refers to the sequence of addresses accessed during program execution. Once this pattern is observed by an attacker, it is possible for the attacker to construct a control flow graph (CFG) of the program. Extensive measurement studies demonstrate the uniqueness of CFG. For example, researchers found (HIDE: an infrastructure for efficiently protecting information leakage on the addressbus, ASPLOS, 2004) that among the 1,334 programs in the standard C library of the Alpha compiler, only 0.05% of the CFGs would match each other. Thus, an attacker can monitor a program's memory ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/0873
CPCG06F12/0873Y02D10/00
Inventor 卜凯梁伟欣李珂黎金洪
Owner ZHEJIANG UNIV
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