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Quick-locking phase-locked loop frequency synthesis device

A frequency synthesis and fast locking technology, applied in the field of wireless communication, can solve the problems of limited locking time acceleration, inability to use effectively, limited loop bandwidth and channel spacing system requirements for glitches, etc., to achieve high-precision frequency preset and fast lock, fast lock effect

Active Publication Date: 2019-01-01
HEBEI UNIV OF ENG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, the following problems still exist at present: 1. Since the loop bandwidth is limited by the channel spacing and the requirements of the system for burrs, the single use of dynamic loop bandwidth technology can only speed up the locking time to a limited extent.
2. For the direct frequency preset technology, the relationship between the frequency preset signal and the output frequency of the voltage-controlled oscillator will change as the temperature changes. The same frequency preset signal will correspond to different preset frequencies when the temperature changes. Resulting in direct frequency preset techniques not being as effective as theoretically predicted
Traditional dynamic bandwidth control technology can no longer be used effectively

Method used

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  • Quick-locking phase-locked loop frequency synthesis device
  • Quick-locking phase-locked loop frequency synthesis device
  • Quick-locking phase-locked loop frequency synthesis device

Examples

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Embodiment Construction

[0034] refer to Figure 1-6 , a specific embodiment of the present invention includes a frequency preset circuit 10, a temperature switch array 11, a dynamic loop bandwidth control circuit 12, a voltage-controlled oscillator 13, a dual-mode preset frequency divider 14, a digital processor 15, and a non-volatile Characteristic memory 16, frequency and phase detector 17, charge pump 18 and loop filter 19;

[0035] The frequency preset circuit 10 is used to receive the frequency preset signal from the digital processor 15 and the dynamic temperature compensation signal of the temperature switch array 11, and generate the control voltage of the voltage-controlled oscillator 13;

[0036] The temperature switch array 11 generates a dynamic temperature compensation signal of the frequency preset circuit 10 for dynamic temperature compensation of the frequency preset circuit 10;

[0037] The dynamic loop bandwidth control circuit 12 is used to receive the clock signal, control signal...

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Abstract

The invention discloses a quick-locking phase-locked loop frequency synthesis device. The quick-locking phase-locked loop frequency synthesis device includes a frequency preset circuit, a temperatureswitch array, a dynamic loop bandwidth control circuit, a voltage controlled oscillator, a dual mode preset frequency divider, a digital processor, a nonvolatile memory, a phase frequency detector, acharge pump and a loop filter. The quick-locking phase-locked loop frequency synthesis device can modify the defects of the prior art, and can improve the locking speed and the control accuracy.

Description

technical field [0001] The invention relates to the technical field of wireless communication, in particular to a fast-locked phase-locked loop frequency synthesis device. Background technique [0002] The phase-locked loop frequency synthesis device (hereinafter referred to as the phase-locked loop) is known as the "heart" of the wireless communication system. It provides the carrier signal to the radio frequency transceiver to complete the modulation and demodulation of the signal. An important index in the design of the phase-locked loop is the locking time, which refers to the time required for the output signal to convert from a certain frequency to another frequency and achieve the required frequency accuracy. [0003] In recent years, with the improvement of the data rate in the communication field, the locking time of the phase-locked loop has become a key indicator of the communication system design more and more. In time-division multiplexing and time-division mul...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/099H03L7/18
CPCH03L7/0992H03L7/18
Inventor 耿志卿马小进黎作鹏
Owner HEBEI UNIV OF ENG
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