A cycle slip suppression circuit for pll frequency synthesizer

Abstract

The invention provides a cycle slip suppressing circuit for a PLL frequency synthesizer, comprising a cycle slip detector, a frequency selector, a cycle slip counting controller, and a decoder. The cycle slip detector detects the phase difference between the reference signal Fref and the feedback signal Fdiv. When the phase difference exceeds the phase detection range of the phase frequency detector PFD, the cycle slip detector generates an advanced detection pulse signal U_CS or a lag detection pulse signal D_CS, Output to the frequency selector and the cycle slip counting controller; the frequency selector selects the leading detection pulse signal U_CS or the lagging detection pulse signal D_CS as the cycle slip pulse signal Fs and outputs it to the cycle slip counting controller, and the cycle slip counting controller controls the cycle slip pulse Carry out accumulation or subtraction to obtain the control word of the decoder, and control the charge pump current of the PLL frequency synthesizer to turn on or off, thereby speeding up the locking of the PLL frequency synthesizer.

Description

technical field [0001] The invention relates to a cycle slip suppressing circuit for a PLL frequency synthesizer, belonging to the technical field of wireless communication radio frequency. Background technique [0002] The phase-locked loop frequency synthesizer is an important component module of the communication system. The main index locking speed of this module determines the channel switching and system start-up speed of the communication system. Especially in time-division multiple access (TDMA) and spread-spectrum frequency-hopping communication systems, the locking speed is the most critical indicator to determine the performance of the frequency synthesizer. For the common charge pump phase-locked loop (CPPLL), the phase noise, spurious and locking speed requirements on the loop bandwidth are always contradictory. To improve the locking speed generally requires the phase-locked loop to have a wide loop bandwidth, and to obtain Good spurious and phase noise perfor...

AI Technical Summary

Problems solved by technology

There are also some patents that use more complex circuit structures, which require additional converter circuits, or add additional control circuits to voltage-controlled oscillators and frequency dividers, which increases the difficulty of implementation and affects the loop at the same time.

Images