Fabrication method of electrically injected silicon-based iii-v nanolaser array

Abstract

The invention provides a preparation method of an electric injection silicon-based III-V nano laser array. The preparation method comprises the steps of depositing silicon dioxide on an SOI substrate,and etching a periodical rectangular groove on the silicon dioxide; corroding the SOI substrate, and corroding below the rectangular groove to obtain an V-shaped groove; growing an III-V laser epitaxial structure in the V-shaped groove and the rectangular groove and polishing the top; etching the III-V laser epitaxial structure and silicon dioxide at two sides of the rectangular groove, so as toform an FP cavity; depositing a silicon dioxide isolation layer, etching the silicon dioxide isolation layer beyond the end surface of the FP cavity, so as to enable the silicon dioxide isolation layer to cover the end surface of the FP cavity; preparing a P electrode metal graph and an N electrode metal graph; and preparing a two-order coupling grating on the III-V laser epitaxial structure amongthe upper surface of the FP cavity, the P electrode metal graph and the silicon dioxide isolation layer. The preparation method of the electric injection silicon-based III-V nano laser array is simple, is easy to perform and is low-cost in manufacture.

Description

technical field [0001] The disclosure relates to the technical field of optoelectronics, in particular to a method for preparing an electrical injection silicon-based III-V nanometer laser array. Background technique [0002] Information technology is one of the main driving forces of social development. During its development, modern integrated circuit technology has maintained an ultra-high-speed development. The high integration of silicon-based transistors is the foundation and core of modern integrated circuit technology. In order to meet the higher requirements for data calculation and processing in the information age, integrated circuits follow Moore's law to continuously reduce the feature size of devices to improve device performance and achieve larger-scale integration. With the development of integrated circuit technology below the 10nm technology node, silicon integrated circuit technology is limited by a series of basic physical problems and process technology ...

AI Technical Summary

Problems solved by technology

At present, using high aspect ratio confinement technology, III-V nanomaterials grown in V-shaped silicon trenches have been able to achieve photoinduced laser lasing; however, due to the small size of the device and the limitation of process technology, it is difficult to prepare metal electrodes, making it difficult to achieve electrolaser lasing

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