Automatic generation method for customizable logic device layout and netlist

Abstract

The invention discloses an automatic generation method for customizable logic device layout and netlist. The method comprises a layout generation method and a netlist generation method. The layout generation method comprises the steps of processing layout resources of sub-modules, and converting a format of a GDS II file into a CIF format to form a CIF file; according to chip resource arrangementinformation specified by a user, calculating out a boundary value, and performing layout operation of corresponding modules to realize scale expansion specified by the user; and after the scale expansion specified by the user is realized, performing writing on the CIF file of the sub-modules to generate new layout information in a CIF format. The netlist generation method comprises the steps of performing analysis processing on a netlist of a description module, extracting information of ports of the module of a top layer of the netlist, and establishing a database; and according to a port connection rule in the module, processing the extracted port information to generate the netlist of all rows and columns. The method supports personalized customization of the user, and is simple in operation, high in speed, feasible in batch processing and high in expandability.

Description

technical field [0001] The disclosure belongs to the field of hardware design in the field of programmable logic devices, and relates to a method for automatically generating layouts and netlists of customizable logic devices. Background technique [0002] The development of integrated circuit technology and the emergence of Field Programmable Gate Array (FPGA) provide users with the ability to program or reconfigure the system. Users can realize the required logic functions by changing the configuration information without relying on the chip. A dedicated chip designed and built by a manufacturer. Since its birth more than 20 years ago, FPGA has gradually evolved from a peripheral device in electronic design to the core of a digital system, and has been widely used in many fields such as the Internet, communications, image processing, automotive electronics, aerospace, and modern military equipment. . [0003] With the increasing scale of FPGA and the increasing complexit...

AI Technical Summary

Problems solved by technology

The overall result depends on the front-end circuit design, and does not support user customization. The scalability is relatively poor, and it takes a lot of repetition time, which is not conducive to quickly seizing the market. In addition, FPGA EDA tools need to be redesigned according to each chip version , will also waste a lot of time

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