Storage structure and manufacturing method thereof

A manufacturing method and storage structure technology, applied in the direction of electrical components, electrical solid devices, circuits, etc., can solve problems affecting the electrical properties of devices, and achieve the effects of eliminating the phenomenon of electronic storage, high selection ratio, and good uniformity

Active Publication Date: 2018-08-24
WUHAN XINXIN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In the above structure, as shown in the figure, it can be clearly seen that an L-shaped silicon nitride layer 16 (as shown by two dotted circles in the figure) appears at the bottom of the trench. The characteristics of capturing electrons, so the memory structure formed by the existing follow-up process can easily store electrons at the position indicated by the dotted circle in the figure, which affects the electrical properties of the entire device

Method used

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  • Storage structure and manufacturing method thereof
  • Storage structure and manufacturing method thereof
  • Storage structure and manufacturing method thereof

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Embodiment Construction

[0031] A storage structure of the present invention and its manufacturing method will be described in more detail below in conjunction with flow charts and schematic diagrams, wherein a preferred embodiment of the present invention is represented, it should be understood that those skilled in the art can modify the present invention described here, and The advantageous effects of the invention are still achieved. Therefore, the following description should be understood as the broad knowledge of those skilled in the art, but not as a limitation of the present invention.

[0032] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known structures and processes are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any practical embodiment, numerous implementation details must be worked out to achieve the developer's sp...

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PUM

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Abstract

The invention discloses a storage structure and a manufacturing method thereof. The manufacturing method comprises that a semiconductor structure in which a groove is formed is provided; a multi-layerfilm layer is formed, and the multi-layer film layer comprises a first dielectric layer formed in the top of the semiconductor structure and the sidewall and the bottom of the groove, an electron storage layer covering the first dielectric layer and a second dielectric layer covering the electron storage layer; part of the multi-layer film layer is etched, the multi-layer film layer in the sidewall of the groove is reserved, and at least part of the electron storage layer in the bottom of the groove is exposed; and the electron storage layer in the bottom of the groove is removed. The electron storage layer in the bottom of the groove is removed, so that the electron storage layer in the bottom of the groove is prevented from electron storage, and performance of the storage structure is improved.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a storage structure and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor technology, it has gradually transitioned from a simple planar structure to a more complex three-dimensional structure, especially the current technology research and development of three-dimensional storage structures has become a mainstream in international research and development. [0003] At present, in the process of forming the three-dimensional storage structure, when forming the corresponding contact hole structure, please refer to figure 1 , is a schematic cross-sectional view of a contact hole structure in the prior art. The method for forming the structure includes: providing a substrate 10; depositing an oxide layer 11, a first silicon dioxide layer 121 and The overlapping layer 12 and the hard mask l...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11578H01L27/11551H01L27/11521H01L27/11568
CPCH10B41/20H10B43/20H10B43/30H10B41/30
Inventor 何佳霍宗亮夏志良隋翔宇陆智勇龚睿洪培真刘藩东吴娴
Owner WUHAN XINXIN SEMICON MFG CO LTD
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