Synchronization method of multi-DSP (Digital Signal Processor) embedded computer system
An embedded computer and algorithm technology, applied in the direction of computer control, general control system, control/regulation system, etc., can solve problems such as the inability to perform algorithm tasks at the same time, reduce the efficiency of collaborative operations, and inaccurate operations, so as to reduce the number of late-stage software The number of synchronizations, the divergence of multi-DSP running time are weakened, and the effect of improving the efficiency of system operation
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[0024] Specific examples of the present invention are given below. The specific embodiments are only used to further describe the present invention in detail, and do not limit the protection scope of the claims of the present application.
[0025] The invention provides a kind of synchronous method (abbreviation method) of many DSP embedded computer systems, it is characterized in that the method comprises the following steps:
[0026] (1) Hardware design: in the multi-DSP embedded computer system, a DSP is planned as the main processor, and all the other DSPs are used as the logical relationship of the slave processor, and all the way I is added between the main DSP and each slave DSP. The hardware connection of the / O semaphore (ie, Flag I / O), traditionally used for a large amount of data exchange between multiple DSP interfaces (such as shared memory, high-speed link interface, etc.) should remain unchanged;
[0027] (2) Power-on bootstrapping: system power-on reset, multi...
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