Neural network operation device and method based on HMC

Abstract

The invention provides a neural network operation device. The device comprises an HMC memory module, at least one neural network processor which is connected with the HMC memory module, and an external access unit. The neural network processor is used for acquiring data and instructions required for neural network operations from the HMC memory module, carrying out neural network partial operations, and writing the operation result back to the HMC memory module. The external access unit is connected with the HMC memory module, reads neural network instructions and data required for neural network operations from an external designated address, inputs the instructions and data into the HMC memory module, and outputs the neural network operation result from the HMC memory module to the external designated address space. The invention further provides a neural network operation method. According to the invention, the requirements for data transmission and storage in the operation processof the neural network operation device can be effectively met, and the device and method have the advantages of high memory utilization, low power consumption overhead, low cost and fast data transmission rate.

Description

technical field [0001] The invention relates to the field of neural network computing, in particular to high-speed data transmission and high-performance storage during neural network computing. Background technique [0002] Neural network is currently widely used in video processing, image processing, speech recognition and optimization computing and other fields. Due to the parallelism and good performance in its own structure, the neural network has received extensive attention, and it is also subtly affecting people's lives. Due to the requirement of the neural network for the operation speed, a dedicated neural network device came into being. [0003] A large amount of data is needed in the process of neural network operation, and the storage and transmission of data has become a technical barrier in the process of neural network operation. How to make the transmission and storage of huge data efficiently during the operation of the neural network and reduce the memor...

AI Technical Summary

Problems solved by technology

Commonly used architectures proposed to improve DRAM storage delay include double data rate synchronous dynamic access random access memory (DDR3) and DDR4. Although they have improved data transmission rate and storage performance, they still use the traditional row-column storage method, still It cannot meet the performance requirements for data storage and transmission in the process of neural network operation

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