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A slotted gate power device with enhanced anti-single event capability

A power device, anti-single particle technology, applied in electric solid state devices, semiconductor/solid state device components, semiconductor devices, etc., can solve the problems of large application limitations, suppressing parasitic transistors, difficult process implementation, etc., to reduce holes Current, Enhanced Reliability, Effect of Enhanced Reliability

Active Publication Date: 2020-07-17
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The embodiment of the present application solves the technical problem that the method of improving the anti-single event capability in the prior art has relatively large application limitations and difficult process implementation by providing a reinforced slot-type gate power device with enhanced anti-single event capability, and achieves In order to extract the hole carriers in advance on the hole flow path, the hole current flowing in the parasitic resistance area is greatly reduced, thereby effectively suppressing the opening of the parasitic transistor and enhancing the reliability of the device's anti-single event capability. technical effect

Method used

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  • A slotted gate power device with enhanced anti-single event capability

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Embodiment 1

[0019] The embodiments of the present application provide a grooved gate power device with enhanced anti-single event capability, and the power field effect transistor is also called PowerMOS field effect transistor. In practical applications, it has better power handling characteristics than bipolar transistors and CMOS field effect transistors. Such as figure 1 shown, the transistors include:

[0020] The N+ source contact 1, the Pwell region 2, the N drift region 3 and the deep groove polysilicon gate form a gate-controlled field-effect transistor structure; the N-type hole blocking layer 4 can block the flow of holes to the N+ region, and the Pwell region Both sides of the deep groove structure are filled with thick oxide layer dielectric 5, and a P+ region is formed at the bottom of the deep groove structure in the Pwell region to absorb hole carriers.

[0021] Specifically, two PN junctions are formed between two differently doped P regions and a layer of lowly doped N...

Embodiment 2

[0029] In order to more clearly describe a slotted gate power device with enhanced anti-single event capability, the embodiment of the present application also provides a working principle of a slotted gate power device with enhanced anti-single event capability. The following is a The working principle of the reinforced groove gate power device with enhanced anti-single event capability is described in detail.

[0030] The structure of this application adds an N-type hole blocking layer 4 under the N+ source 1 to block the flow of holes; at the same time, the source contact adopts grooves to pass through the N-type hole blocking layer 4 area, providing a hole The collection channel flowing to the source, the two sides of the groove structure are thick oxide layer 5 sidewalls, the hole blocking layer 4 is not in contact with the source and has an electrical connection, it only serves as a hole blocking effect, avoiding the N-type hole blocking layer 4 is electrically connected...

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Abstract

The application provides a trough type grate power device for enhancing reinforcement of resistance to a single particle, and relates to the field of semi-conductor devices. The trough type grate power device comprises an N+ source contact region, a Pwell region and an N drift region, wherein the N+ source contact region is in a deep trough structure; the Pwell region is located below an N+ source; the N drift region is located below the Pwell region; and the N+ source, the Pwell region and the N drift region form a parasitic NPN transistor structure. The device also comprises an N type hole blocking layer arranged below the N+ source and used for blocking the flow of hole carriers. According to the device, the technical problems of a method for improving the resistance to the single particle in the prior art that the application limitation is great, and the process is difficult in implementation, are solved, a hole flow path in a traditional structure is improved, and hole current flowing through a parasitic resistor region is greatly reduced, and therefore, the opening of a parasitic transistor is effectively suppressed, and the technical effect of enhancing the reliability of the resistance to the single particle is achieved.

Description

technical field [0001] The present application relates to the field of semiconductor devices, in particular to a slot-type gate power device reinforced with enhanced anti-single event capability. Background technique [0002] Trench power MOSFETs with trench gate structure are widely used in the field of power control due to their advantages of low on-state voltage drop, high frequency operation capability, simple drive control, and easy parallel connection. However, in harsh environments, the device's anti-single event ability is poor. [0003] However, in the process of realizing the application technical solution in the embodiment of the application, the applicant of the present application found that the above-mentioned technology has at least the following technical problems: [0004] The methods for improving the anti-single particle capability in the prior art have the technical problems of relatively large application limitations and difficult process implementation...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L23/552
CPCH01L23/552H01L29/7813
Inventor 陆江刘海南卜建辉蔡小五罗家俊
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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