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Method and device for interrupt handling between heterogeneous operating systems on multi-core CPU

A technology of operating system and guest operating system, which is applied in the field of interrupt processing between heterogeneous operating systems on multi-core CPUs, and can solve the problems of prolonging the interrupt processing time and reducing the real-time performance of real-time operating systems

Active Publication Date: 2018-05-25
KYLAND TECH CO LTD +1
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  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Embodiments of the present invention provide a method and device for processing interrupts between heterogeneous operating systems on a multi-core CPU to solve the problem in the prior art that the interrupt processing delay is long and the real-time performance of the real-time operating system is reduced

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  • Method and device for interrupt handling between heterogeneous operating systems on multi-core CPU

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Embodiment Construction

[0045] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0046] In the embodiment of the present invention, it is mainly aimed at the interrupt processing of the heterogeneous operating system on the multi-core CPU based on virtualization technology. For the convenience of understanding, the following first introduces the multi-core CPU interrupt system. figure 2 Shown is a schematic diagram of the multi-core CPU interrupt architecture.

[0047] In the Symmetrical Multi-Processing (SMP) architecture...

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Abstract

The invention relates to the technical field of virtualization and cloud computing, in particular to a method and device for interrupt handling between heterogeneous operating systems on a multi-coreCPU. During a VMM initialization phase, a physical address of an I / O APIC is not mapped in an EPT of a guest operating system. When the I / O APIC is initialized by the guest operating system, an EPT exception is triggered, and a VMM exception handler is entered. Through a write interface of a virtual APIC, an RTE of the I / O APIC is modified, and the modification of the RTE is achieved. When an external device generates an interrupt, according to the modified RTE, the I / O APIC can directly deliver an interrupt message to a CPU of the corresponding guest operating system instead of managing and delivering via a VMM, which reduces multiple VM-exit operations that are caused by each interrupt processing process. The delay of interrupt processing is reduced, so that the real-time performance ofa real-time operating system can be improved, and the access efficiency of I / O devices is improved.

Description

technical field [0001] The invention relates to the technical field of virtualization and cloud computing, in particular to a method and device for processing interrupts between heterogeneous operating systems on a multi-core CPU. Background technique [0002] At present, for the multi-core central processing unit (Central Processing Unit, CPU), usually multiple virtual machines are used to securely partition important work content, some virtualized partitions run real-time operating systems, and real-time applications run on them, and some virtual machines The non-real-time operating system runs in the partition, and the non-real-time application runs on it, and its architecture refers to figure 1 shown. Among them, interrupt delay is an important factor affecting the real-time performance of real-time operating systems. Therefore, in the industrial control virtualization heterogeneous operating system environment running real-time operating systems and non-real-time opera...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48G06F9/455
CPCG06F9/45558G06F9/4812G06F2009/45575G06F2009/45579
Inventor 彭元志
Owner KYLAND TECH CO LTD
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