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Logic circuit and extraction method for extracting image sharpness information with zero delay in pipeline mode

A logic circuit and assembly line technology, applied in image communication, television, electrical components, etc., can solve problems such as delayed timing, target tracking failure, etc., to improve the degree of integration, realize one-key focusing, and realize the effect of real-time servo automatic focusing.

Active Publication Date: 2020-01-14
LUOYANG INST OF ELECTRO OPTICAL EQUIP OF AVIC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the operator handles multiple tasks or the distance of the detected target changes drastically, it often delays the timing and even leads to the failure of target tracking

Method used

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  • Logic circuit and extraction method for extracting image sharpness information with zero delay in pipeline mode
  • Logic circuit and extraction method for extracting image sharpness information with zero delay in pipeline mode
  • Logic circuit and extraction method for extracting image sharpness information with zero delay in pipeline mode

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Embodiment Construction

[0030] Now in conjunction with embodiment, accompanying drawing, the present invention will be further described:

[0031] The visible light video source of a certain type of airborne photoelectric detection device adopts the high-definition SDI format. The front end of the visible light imaging component is equipped with a visible light video acquisition circuit, and the rear end is equipped with a digital focus control circuit. The middle section implements the logic circuit described in the present invention. The automatic focus function needs to be completed by the relevant program software associated with the present invention.

[0032] The embodiment of the present invention consists of: a pixel coordinate analysis logic circuit, a pixel value line buffer logic circuit, an image sharpness operation trigger logic circuit, a pixel-level sharpness operation logic circuit, and an image-level sharpness accumulation logic circuit, and is characterized in that: Comprehensive im...

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Abstract

The invention relates to a logic circuit and an extraction method for extracting image sharpness information in a pipeline mode with zero delay, adopting a field programmable gate array (FPGA) as a hardware implementation platform for image processing, and dividing the logic circuit into: pixel coordinate analysis logic circuit , pixel value line buffer logic circuit, image sharpness operation trigger logic circuit, pixel-level sharpness operation logic circuit, image-level sharpness accumulation logic circuit and other 5 parts. Using the timing signal superimposed on the high-definition video source, the coordinate index value of the image pixel is reconstructed in real time for subsequent trigger control logic; through the multi-channel buffer queue method, the image data is regrouped to make the subsequent processing pipeline. The beneficial effects of the invention are: the airborne photoelectric detection system realizes the acquisition of image sharpness information and has the precondition of automatic focus function. Improve the imaging quality, intelligence level, and integration of visible light imaging components.

Description

technical field [0001] The invention belongs to an image processing circuit of an airborne photoelectric detection system, and relates to a logic circuit and an extraction method for extracting image sharpness information in a pipeline mode with zero delay. Background technique [0002] Airborne photoelectric detection systems integrated with visible light imaging devices are often unable to image clearly due to factors such as the adjustment of the field of view of the visible light camera and the distance change of the detected target. The reason for this phenomenon is that the best imaging target surface of the camera lens does not coincide with the photosensitive surface of the CCD, that is, there is no accurate focus. The existing measure is to manually focus once when the system is initialized; during the normal detection process of the system, when the picture is blurred, manually perform focus compensation. The disadvantages of existing measures include heavy relian...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N5/232H04N5/208
CPCH04N5/208H04N23/67H04N23/60
Inventor 张豪刘彤
Owner LUOYANG INST OF ELECTRO OPTICAL EQUIP OF AVIC
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