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Preparation of a label-free parity checker and its application in logic imaging

A logic and logic gate technology, applied in the preparation method of DNA parity checker and in the field of biological logic imaging, can solve the problems of complex construction process of label-free logic devices and the like

Active Publication Date: 2020-08-04
TAIZHOU UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the creation of label-free logic devices based on the molecular level is rare, which is caused by the complex process of building label-free logic devices.
Such label-free logic devices are critical to processors, but building some specific-purpose label-free logic devices at the molecular level remains a formidable challenge

Method used

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  • Preparation of a label-free parity checker and its application in logic imaging
  • Preparation of a label-free parity checker and its application in logic imaging
  • Preparation of a label-free parity checker and its application in logic imaging

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Embodiment 1

[0017] Preparation of silver nanoclusters: 5 μM S-DNA was dissolved in Tris-Ac (10 mM Tris-Ac, pH=8.0) buffer solution, then heated at 90° C. for 10 minutes, and then slowly cooled to room temperature. Then 30 μM AgNO 3 Added to 5μM S-DNA solution, after mixing, the mixed solution was placed in the dark for 2 hours, so that the Ag + The ion fully interacts with the C base. Finally, add 30 μM NaBH to the buffer system again 4 solution, shaken vigorously for 1 min. The fluorescent silver nanoclusters were prepared by reacting overnight at 4°C in the dark.

Embodiment 2

[0019] Preparation of a parity checker based on silver nanoclusters and graphene oxide: 100 nM silver nanoclusters and 15 μg / mL graphene oxide were mixed as a logic operation platform. When a 1μM logic sequence is added, the input is recorded as "1", otherwise it is "0". Based on whether the relative fluorescence intensity is greater than 0.5 or not, the output is "1" when the relative fluorescence intensity is greater than 0.5, and the output is "0" when the relative fluorescence intensity is less than 0.5. According to attached figure 2 and 4 As shown, adding different combinations of input DNA sequences (D 1 ,D 2 and D 3 ), 2-bit and 3-bit parity checkers can be constructed. When the device can verify the correctness of the received data.

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Abstract

The invention belongs to the technical field of molecular logic gates for analytical chemistry and relates to a preparation method of a label-free fluorescent DNA logic device and an application of the label-free fluorescent DNA logic device in the field of cell imaging. The molecular logic gates are built based on the principle that a DNA single chain-protected silver nanocluster and graphene oxide contact and undergo fluorescence quenching, double strands are formed through hybridization and then fluorescence is recovered, a fluorescence intensity relative value of the silver nanocluster isused as criterion, when the fluorescence intensity is greater than 0.5, the output is 1 and when the fluorescence intensity is less than 0.5, the output is 0. The molecular logic gates include a XOR type logic gate and XOR type logic gates connected in series so that 2-bit and 3-bit parity checkers are constructed. The molecular logic devices are used to the field of cell imaging. The logic devicehas a fluorescent logic imaging function and has a potential application value in detection of intracellular biomolecules and early diagnosis of major diseases.

Description

technical field [0001] The invention relates to a preparation method of a label-free DNA parity checker and its application in the field of biological logic imaging. Background technique [0002] As the basic device of integrated circuits and some electronic devices, electronic logic gates are the basis for electronic computers to realize logical operations and operations. In the past few decades, electronic computers have made remarkable achievements and led many technological revolutions. Electronic computers are based on crystalline silicon and are composed of multiple electronic logic gates connected in series or in parallel. These electronic logic gates can convert various information into electrical signals to complete data storage, extraction and calculation. The simplest electronic logic consists of transistors that, when current passes through them, generate high and low current signals. These signals represent "1" and "0" in logic operations, respectively. Throu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01N21/64
CPCG01N21/6486
Inventor 张思奇韩得满
Owner TAIZHOU UNIV
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