Preparation of a label-free parity checker and its application in logic imaging
A logic and logic gate technology, applied in the preparation method of DNA parity checker and in the field of biological logic imaging, can solve the problems of complex construction process of label-free logic devices and the like
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Embodiment 1
[0017] Preparation of silver nanoclusters: 5 μM S-DNA was dissolved in Tris-Ac (10 mM Tris-Ac, pH=8.0) buffer solution, then heated at 90° C. for 10 minutes, and then slowly cooled to room temperature. Then 30 μM AgNO 3 Added to 5μM S-DNA solution, after mixing, the mixed solution was placed in the dark for 2 hours, so that the Ag + The ion fully interacts with the C base. Finally, add 30 μM NaBH to the buffer system again 4 solution, shaken vigorously for 1 min. The fluorescent silver nanoclusters were prepared by reacting overnight at 4°C in the dark.
Embodiment 2
[0019] Preparation of a parity checker based on silver nanoclusters and graphene oxide: 100 nM silver nanoclusters and 15 μg / mL graphene oxide were mixed as a logic operation platform. When a 1μM logic sequence is added, the input is recorded as "1", otherwise it is "0". Based on whether the relative fluorescence intensity is greater than 0.5 or not, the output is "1" when the relative fluorescence intensity is greater than 0.5, and the output is "0" when the relative fluorescence intensity is less than 0.5. According to attached figure 2 and 4 As shown, adding different combinations of input DNA sequences (D 1 ,D 2 and D 3 ), 2-bit and 3-bit parity checkers can be constructed. When the device can verify the correctness of the received data.
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