Method and device for laser processing wafer

Abstract

The invention provides a wafer laser-machining method and device. The relative positions of a laser beam and a predetermined cutting path are changed in the direction of the predetermined cutting pathon the upper surface of a wafer, so that a groove is formed in the predetermined cutting path. The method comprises the steps that a flattop light spot is formed on the predetermined cutting path after the laser beam is subjected to shape correction treatment; the flattop light spot is subjected to defocusing treatment, and M-shaped energy distribution with the edge energy greater than the intermediate energy is formed; the flattop light spot with the M-shaped energy distribution is used for etching the predetermined cutting path, so that the groove is formed; and the flattop light spot is subjected to defocusing treatment, energy flattop distribution is formed, and then the flattop light spot with the energy flattop distribution is used for etching the groove again. According to the wafer laser-machining method and device, the wafer can be etched through the flattop light spot with the different energy distribution forms in sequence, the groove bottom of the groove is flatter, the groove wall is steeper, the groove shape quality of the groove is improved, and subsequent machining requirements and the laser machining yield are guaranteed.

Description

technical field [0001] The invention relates to the technical field of semiconductor processing, in particular to a method and device for laser processing wafers. Background technique [0002] In recent years, with the continuous reduction of the feature size of semiconductor devices and the continuous improvement of chip integration, the parasitic capacitance between metal interconnections and multilayer wiring and the resistance of metal wires have increased sharply, resulting in RC delays, A series of problems such as increased power consumption limit the development of high-speed electronic components. When the feature size of the device is smaller than 90nm, the wafer must use low dielectric constant material instead of traditional SiO 2 Layer (K ​​= 3.9 ~ 4.2), commonly used Low-K materials include Dow Corning's FOx and porous SiLK materials, Applied Materials' black diamond series low-K thin film materials, Novellus System's CORAL, Intel's CDO and NEC's FCN+ organic...

AI Technical Summary

Problems solved by technology

[0004] However, the existing laser cutting is to form a groove on the wafer. Since the laser is Gaussian distributed during cutting, the shape of the groove is "V" and the edge cannot be removed cleanly.

So when cutting with a blade after etching, the cutting may damage the device

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