Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Measurement method of trap energy level distribution in oxide layer of semiconductor device

A trap energy level, oxide layer technology, applied in the direction of single semiconductor device testing, non-contact testing, etc., can solve the problems of poor conductivity, difficulty in characterizing traps in the silicon dioxide layer, and low carrier concentration, and achieve simple steps. Effect

Inactive Publication Date: 2018-01-16
INST OF ELECTRONICS ENG CHINA ACAD OF ENG PHYSICS
View PDF14 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, since silicon dioxide is an amorphous material with a very wide band gap, low carrier concentration and poor conductivity, it is very difficult to characterize the traps in the silicon dioxide layer.
In addition, X-ray irradiation is often used to inject carriers into the oxide layer, which requires high equipment and cumbersome experimental procedures; and may cause further damage to the oxide layer

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Measurement method of trap energy level distribution in oxide layer of semiconductor device
  • Measurement method of trap energy level distribution in oxide layer of semiconductor device
  • Measurement method of trap energy level distribution in oxide layer of semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] The method for measuring the energy level of traps in the oxide layer of a semiconductor device according to the present invention will be described in detail below in conjunction with the accompanying drawings. Taking the p-channel MOS transistor as an example, the oxide layer of the device is prepared by dry oxidation at 900°C, with a thickness of 80 nanometers:

[0029] figure 1 It is a test flowchart of the present invention, comprising the following steps:

[0030] Step S1, fix the device in the sealed cavity, such as figure 2 As shown, the source and drain of the device are grounded, and the substrate and gate are connected to the source meter HP4140B to apply voltage and measure current.

[0031] In step S2, in the absence of carrier injection, a bias voltage of -10V is applied between the gate and the substrate, and the temperature of the device in the sealed cavity is controlled to rise linearly at a rate of 0.1°C / min from room temperature of 25°C. Until 35...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention provides a measurement method of the trap energy level distribution in an oxide layer of a semiconductor device. The basic principle of the measurement method is that firstly thevisible light irradiates a substrate to excite the free carriers, at the same time, by applying a certain voltage, the carriers are injected in a silicon dioxide layer to be captured by the energy level of a trap; then, by a linear warming method, the bound carriers captured by the trap are excited again to change into the free carriers, and a change curve of a current contributed by the part ofcarriers along with the temperature is measured; and finally, according to a thermal simulation current model, the energy level distribution of the trap in the silicon dioxide is obtained. According to the measurement method of the present invention, by the visible light and by applying the voltage, the carriers are injected in the silicon dioxide, and a mode of using the X-rays to irradiate to inject the carriers and the further damage to the silicon dioxide are avoided.

Description

technical field [0001] The invention relates to research on the quality and reliability of semiconductor devices, in particular to a method for measuring trap energy level distribution in oxide layers of semiconductor devices. Background technique [0002] With the rapid development of chip manufacturing technology and the substantial improvement of chip integration, the performance of integrated circuits has become more and more advanced, the device size has become smaller and smaller, and the thickness of the oxide layer has become thinner and thinner. The quality of the oxide layer is directly related to the performance and stability of the device. The trap level of the oxide layer in the device will trap carriers and form semiconductor charges, which will cause the threshold voltage of the device to shift, increase the gate leakage current of the device, and reduce the reliability and long-term stability of the device. Therefore, it is necessary to measure the trap stat...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G01R31/265
Inventor 张光辉董鹏宋宇杨萍李沫代刚张健
Owner INST OF ELECTRONICS ENG CHINA ACAD OF ENG PHYSICS
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products