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PCB preparation method and PCB

A technology for area and connecting lines, applied in chemical/electrolytic methods to remove conductive materials, printed circuit manufacturing, printed circuits, etc., can solve problems affecting the efficiency of PCB processing and preparation of wiring density, reduce the number of layouts, and increase wiring density Effect

Active Publication Date: 2017-12-29
DONGGUAN SHENGYI ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, traditional metallized holes can only realize the connection of a single network. At this time, in order to realize the design of different network wiring between layers, it is usually necessary to process multiple metallized holes, which seriously affects the wiring density and the processing efficiency of PCB.

Method used

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  • PCB preparation method and PCB
  • PCB preparation method and PCB
  • PCB preparation method and PCB

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Embodiment Construction

[0034] Embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0035] The technical solutions of the present invention will be further described below in conjunction with the accompanying drawings and through specific implementation methods.

[0036] Such as figure 1 Shown, the present invention provides a kind of PCB preparation method, and it comprises the steps:

[0037] Step 1: Design the position of the metallized hole and the number of connecting lines 1 to be integrated on the hole position according to the circuit pattern 2 on the surface of the PCB.

[0038] In this ste...

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Abstract

The invention discloses a preparation method and a PCB, which belong to the technical field of PCB preparation. The PCB preparation method comprises the steps of (A) arranging a hole having an inclined side wall in the PCB; (B) conducting copper plating on PCB surface and the sidewall of the hole; (C) coating a protective layer on the line graph area of the PCB surface and on a plurality of connecting line areas of the sidewall of the hole; (D) conducting etching on the copper plating in the PCB non-line graph area and the non-coating protective layer of the sidewall of the hole, and obtaining the PCB having a multi-line plated through hole. The PCB is prepared by the above PCB preparation method. The invention is advantageous in that with the arrangement of the hole having an inclined sidewall, local metallization of the hole can be realized; a plurality of connecting lines can be integrated in one metallization hole; the arrangement number of the metallization holes in the PCB can be effectively reduced; the wiring density of the PCB line graph can be enhanced.

Description

technical field [0001] The invention relates to the technical field of PCB preparation, in particular to a PCB preparation method and a PCB. Background technique [0002] PCB (Printed Circuit Board), the Chinese name is printed circuit board, as a support for electronic components, it is an important electronic component. [0003] With the development of PCB towards dense, thin and flat, the wiring density on PCB is getting higher and higher. In PCB design, interlayer circuit patterns are connected through metallized holes, that is, networked. However, traditional metallized holes can only realize the connection of a single network. At this time, in order to realize the design of different network wiring between layers, it is usually necessary to process multiple metallized holes, which seriously affects the wiring density and the efficiency of PCB processing and preparation. Contents of the invention [0004] The object of the present invention is to provide a method fo...

Claims

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Application Information

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IPC IPC(8): H05K3/42H05K3/06H05K1/11
CPCH05K1/115H05K3/06H05K3/429H05K2201/09645
Inventor 王洪府赵刚俊纪成光万里鹏
Owner DONGGUAN SHENGYI ELECTRONICS
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