Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Longitudinal-channel SiC Schottky gate bipolar transistor and fabrication method thereof

A bipolar transistor and Schottky gate technology, applied in the field of microelectronics, can solve the problems of complex structure, low production cost and yield, and reduce device mobility, so as to avoid the influence of device characteristics and reduce the difficulty of device process Effect

Inactive Publication Date: 2017-05-31
XIDIAN UNIV
View PDF2 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The existence of the gate oxide layer introduces the influence of the interface state, which reduces the mobility of the device
The parasitic pnpn structure in the device is prone to latch-up effect in the high current state, and the device is no longer controlled by the gate
Relatively speaking, the structure of traditional IGBT devices is more complicated, and the production cost and yield are lower.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Longitudinal-channel SiC Schottky gate bipolar transistor and fabrication method thereof
  • Longitudinal-channel SiC Schottky gate bipolar transistor and fabrication method thereof
  • Longitudinal-channel SiC Schottky gate bipolar transistor and fabrication method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0043] A SiC Schottky gate bipolar transistor device with a vertical channel, specifically as figure 2As shown, including an N+ silicon carbide substrate 2, an emitter contact metal layer 1 formed on the surface of the N+ silicon carbide substrate 2, a P+ buffer layer 3 formed on the N+ silicon carbide substrate 2, and a P+ buffer layer 3 formed on the P-drift region 4, P+ collector region 5 formed on P-drift region 4, collector contact metal layer 6 formed on P+ collector region 5; also includes at least two P+ collector regions formed on P-drift region 4 vertical trenches, and a Schottky gate metal layer 7 is formed on each trench.

[0044] Among them, the emitter contact metal layer 1 is Ni metal with a thickness of 500nm, the thickness of the N+ silicon carbide substrate 2 is 2 μm, the thickness of the P+ buffer layer 3 is 1 μm, and the doping concentration of aluminum ions is 1×10 18 cm -3 ; The thickness of the P-drift region 4 is 15 μm, and the doping concentration o...

Embodiment 2

[0061] A SiC Schottky gate bipolar transistor device with a vertical channel, specifically as figure 2 As shown, including an N+ silicon carbide substrate 2, an emitter contact metal layer 1 formed on the surface of the N+ silicon carbide substrate 2, a P+ buffer layer 3 formed on the N+ silicon carbide substrate 2, and a P+ buffer layer 3 formed on the P-drift region 4, P+ collector region 5 formed on P-drift region 4, collector contact metal layer 6 formed on P+ collector region 5; also includes at least two P+ collector regions formed on P-drift region 4 vertical trenches, and a Schottky gate metal layer 7 is formed on each trench.

[0062] Among them, the emitter contact metal layer 1 is Ni metal with a thickness of 500nm, the thickness of the N+ silicon carbide substrate 2 is 3 μm, the thickness of the P+ buffer layer 3 is 1.5 μm, and the doping concentration of aluminum ions is 2×10 18 cm -3 ; The thickness of the P-drift region 4 is 16 μm, and the doping concentratio...

Embodiment 3

[0079] A SiC Schottky gate bipolar transistor device with a vertical channel, specifically as figure 2 As shown, including an N+ silicon carbide substrate 2, an emitter contact metal layer 1 formed on the surface of the N+ silicon carbide substrate 2, a P+ buffer layer 3 formed on the N+ silicon carbide substrate 2, and a P+ buffer layer 3 formed on the P-drift region 4, P+ collector region 5 formed on P-drift region 4, collector contact metal layer 6 formed on P+ collector region 5; also includes at least two P+ collector regions formed on P-drift region 4 vertical trenches, and a Schottky gate metal layer 7 is formed on each trench.

[0080] Among them, the emitter contact metal layer 1 is Ni metal with a thickness of 500nm, the thickness of the N+ silicon carbide substrate 2 is 1 μm, the thickness of the P+ buffer layer 3 is 2 μm, and the doping concentration of aluminum ions is 3×10 18 cm -3 ; The thickness of the P-drift region 4 is 17 μm, and the doping concentration ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
widthaaaaaaaaaa
thicknessaaaaaaaaaa
electron work functionaaaaaaaaaa
Login to View More

Abstract

The invention provides a longitudinal-channel SiC Schottky gate bipolar transistor. The longitudinal-channel SiC Schottky gate bipolar transistor comprises an N+ silicon carbide substrate, an emitter contact metal layer, a P+ buffer layer, a P- drift region, a P+ current collection region and a collector contact metal layer and also comprises at least two vertical grooves, wherein the emitter contact metal layer is formed on a surface of the N+ silicon carbide substrate, the P+ buffer layer is formed on the N+ silicon carbide substrate, the P- drift region is formed on the P+ buffer layer, the P+ current collection region is formed on the P- drift region, the collection contact metal layer is formed on the P+ current collection region, the at least two vertical grooves are formed in the P- drift region, and a Schottky gate metal layer is formed on each groove. In the device provided by the invention, an upper part structure of a traditional insulated gate bipolar transistor (IGBT) device is substituted by employing a channel structure of a longitudinal-channel junction field-effect transistor (JFET) device on the P- drift region and taking Schottky contact metal as a device gate, and the width of a channel region of the device is 0.5-1.5 micrometers; and the device has the advantages of simple fabrication process, low cost, high device current grain and the like and can be used for a switching voltage-stabilization power supply, electric energy conversion, automobile electron, petroleum drilling equipment and the like.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and relates to a semiconductor device, in particular to a silicon carbide bipolar transistor based on a longitudinal trench Schottky gate and a preparation method thereof. Background technique [0002] With the rapid development of power electronics technology, the demand for high-power semiconductor devices is becoming more and more significant. Due to the limitation of materials, the characteristics of traditional silicon devices have reached its theoretical limit. Silicon carbide is a wide bandgap semiconductor material that has been developed rapidly in the past ten years. It has wide bandgap, high thermal conductivity, and high carrier saturation migration. High efficiency, high power density and other advantages, can be applied to high power, high temperature and radiation resistance and other application fields. Among them, IGBT (silicon carbide insulated gate bipolar transistor)...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/739H01L29/47H01L29/16H01L21/331
CPCH01L29/7395H01L29/1608H01L29/47H01L29/66068
Inventor 宋庆文刘思成汤晓燕元磊张艺蒙张玉明
Owner XIDIAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com