A method of testing 3dnand word line resistance

Abstract

The present invention relates to the technical field of memory failure analysis, in particular to a method for testing 3D NAND word line resistance, comprising: step S1, thinning 3D NAND to expose the first contact hole and the second contact hole of each word line; step S2, at the first end of the word line, forming a metal pad to cover the first contact hole of the word line in each layer, so as to electrically connect the first end of the word line in each layer; step S3, at the first end of the word line At the second end of the word line, select a layer of word line to be tested, and mark the point to be tested on the second contact hole of the word line to be tested; step S4, use conductive glue to lead the metal pad to the A position close to the point to be measured; step S5, select a measuring point on the conductive glue close to the point to be measured, and use a probe to measure the resistance between the measuring point and the point to be measured value, as the resistance value between the first end and the second end of the word line to be tested.

Description

technical field [0001] The invention relates to the technical field of memory failure analysis, in particular to a method for testing 3D NAND word line resistance. Background technique [0002] With the development of semiconductor technology, various semiconductor memory devices have been proposed. Compared with conventional storage devices such as magnetic storage devices, semiconductor storage devices have the advantages of fast access speed and high storage density. Among them, the NAND structure is receiving more and more attention. To further increase storage density, various three-dimensional (3D) NAND devices have emerged. [0003] In 3D NAND structure memory, the word line (WL) is generally designed to have several to dozens of layers. During failure analysis, it is sometimes necessary to measure and analyze the WL resistance of each layer of the product. There are generally two types of measurement requirements, one is to measure at key test points, and the exis...

AI Technical Summary

Problems solved by technology

There are generally two types of measurement requirements, one is to measure at key test points, and the existing wafer reliability parameter test (WAT test for short) can meet the requirements; the other is to use probes for measurement, but because The product structure is special, the WL length is too large, reaching 6mm, and the limit range that the probe can test is 300μm, which makes the existing equipment unable to measure the required data

At the same time, the channel hole spacing on the WL is only 20nm, which cannot be tested in sections

[0004] Therefore, there is no method in the prior art that can effectively measure the resistance of 3D NAND word lines

Images