Topological structure based on staggered three-dimensional light network-on-chip and wavelength distribution method

Abstract

The invention provides a topological structure based on a staggered three-dimensional light network-on-chip and a wavelength distribution method, and aims to solve the technical problems of serious blockage in the network and high loss in the prior art. The topological structure comprises two layers of 2D-Mesh light networks-on-chip and an interlaminar router; the light networks-on-chip comprise NxN routers connected through optical waveguides; each router is connected with an IP core; the two layers of light networks-on-chip are staggered from each other along the corresponding diagonals, and optical waveguides are added into the light networks-on-chip corresponding to gaps in four single-layer parts on the staggering edges along the optical waveguide directions in the light networks-on-chip; and the interlaminar router is arranged at a position perpendicular to the space where the optical waveguides of the different layer are positioned. The wavelength distribution method of the topological structure comprises the following steps: firstly establishing a three-dimensional coordinate system, and selecting wavelength values; secondly, distributing the wavelength values to all nodes; and finally, configuring a working offset state and temperature of an exchange microring resonator or an interlaminar microring coupler according to the wavelength values distributed to all the nodes.

Description

technical field [0001] The invention belongs to the technical field of on-chip communication, and relates to a topology structure and a wavelength allocation method of a three-dimensional optical on-chip network, in particular to a topological structure and a wavelength allocation method of a three-dimensional optical on-chip network based on a staggered layer, which can be used for network internal cores. reliable communication. Background technique [0002] Network on Chip (Network on Chip, NoC), based on the packet switching method and layered method, realizes the separation of processing units and communication structures: the IP core in the network on chip is connected to the network through routing nodes, and the routers are connected through link nodes. It has good scalability and provides good parallel communication capabilities. The network on chip includes a network on chip using an electrical connection and an optical network on chip (Optical Network on Chip, ONo...

AI Technical Summary

Problems solved by technology

The routing structure of this 7×7 port router is complex, including at least 36 microring resonators and 8 optical waveguides inside. There are many cross nodes between the optical waveguides and a large number of bent optical waveguides, resulting in large losses

The three-dimensional optical network on chip with 3D-Mesh topology realizes the communication between IP cores of the same layer and IP cores of different layers in the network, but there are problems of serious blocking and loss

However, this wavelength allocation method only alleviates the blocking problem during inter-layer communication, and there is still serious blocking in intra-layer communication.

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