SRAM memory cell and circuit for improving read/write stability of SRAM memory cell
A storage unit and stable technology, applied in the direction of information storage, static memory, digital memory information, etc., can solve the problems of increasing the complexity of the circuit, increasing the memory area, etc., to save area, improve reliability, and good read and write ability Effect
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[0068] In a specific embodiment, the first PMOS transistor 301 and the second PMOS transistor 302 adopt independent gate mode FINFET devices; the first NMOS transistor 305 and the second NMOS transistor 306 adopt common gate mode FINFET devices. The first switching device 303 and the second switching device 304 adopt NMOS transistors, independent gate mode FINFET devices; the first grid gate1 is connected to the write word line WWL, and the second grid gate2 is connected to the word line WL; the first PMOS transistor 301 Both the first grid gate1 and the second PMOS transistor 302 are connected to the power supply voltage VDD, so that the first grid gate1 is in an off state, and the first PMOS transistor 301 and the second PMOS transistor are controlled by the second grid gate2 The turn-on and turn-off of 302, compared with the device whose channel is jointly controlled by the first gate gate1 and the second gate gate2, has a weakened drive capability, which can improve the wri...
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