Transverse high-pressure device and manufacturing method thereof
A lateral high-voltage, device technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as rising on-resistance and limiting applications
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Embodiment 1
[0041] figure 2 A cross-sectional view of a lateral high-voltage device structure provided in this embodiment.
[0042] A lateral high-voltage device, the cell structure of which includes a first conductivity type semiconductor substrate 1, a second conductivity type semiconductor drift region disposed above the first conductivity type semiconductor substrate 1, and the second conductivity type semiconductor drift region is composed of A plurality of semiconductor sub-drift regions 21, 22...2i of the second conductivity type are stacked sequentially from bottom to top, and each semiconductor sub-drift region of the second conductivity type includes: one located on the left side of the semiconductor sub-drift region of the second conductivity type The first conductivity type semiconductor body region, one first conductivity type semiconductor drop field layer arranged on the right side of the first conductivity type semiconductor body region, one first conductivity type semico...
Embodiment 2
[0045] Such as image 3 As shown, the difference between this embodiment and Embodiment 1 is that: not every semiconductor sub-drift region 21, 22...2i of the second conductivity type is provided with a second conductivity type semiconductor heavily doped layer; the second conductivity type The i-th heavily doped semiconductor layer is disposed on the upper surface of the i-th drift region of the uppermost second-conductivity-type semiconductor and above the i-th drop field layer of the first-conduction-type semiconductor in the i-th drift region.
Embodiment 3
[0047] Such as Figure 4 As shown, this embodiment is basically the same as Embodiment 1, the difference is that it also includes a buried oxide layer 2, and the buried oxide layer 2 is arranged on the semiconductor substrate 1 of the first conductivity type and the first drift region 21 of the semiconductor of the second conductivity type. The device is integrated on the SOI substrate, and its working principle and effect are the same as those in Embodiment 1.
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