SRAM (Static Random Access Memory) storage unit, SRAM circuit and reading and writing method thereof

Abstract

The invention provides an SRAM (Static Random Access Memory) storage unit, an SRAM circuit and a reading and writing method thereof. The SRAM storage unit is composed of first, second, third, fourth, fifth, sixth and seventh MOS (Metal Oxide Semiconductor) transistors and eighth, ninth and tenth MOS transistors, wherein the first, second, third, fourth, fifth, sixth and seventh MOS transistors participate in writing operation; the eighth, ninth and tenth MOS transistors participate in reading operation; the grid of the third MOS transistor is connected to a first control signal; the grid of the fourth MOS transistor is connected to a second control signal; the grid of the ninth MOS transistor is connected to a column selection signal; and the grid of the tenth MOS transistor is connected to a word line. According to the invention, power consumption and loss of the existing data aware type SRAM structure in a half-selected state can be avoided; influence to the stability of the SRAM storage unit due to a parasitic capacitor is reduced; and simultaneously, the reading and writing performances are improved.

Description

technical field [0001] The invention relates to the field of SRAM circuits, in particular to an SRAM storage unit, an SRAM circuit and a reading and writing method thereof which avoid the influence of a half-selected state. Background technique [0002] As a member of memory chips, Static Random Access Memory (SRAM) has the advantages of high speed, low power consumption and compatibility with standard processes, and is widely used in PCs, personal communications, consumer electronics (smart cards, digital cameras, multimedia players, etc.) device) and other fields. With the development of mobile electronic products, higher requirements are placed on chip power consumption and stability. As one of the important components in the chip, the low-power design method and low-power unit structure of SRAM will help to improve the use time of electronic products and improve the user experience of products. [0003] refer to figure 1 as shown, figure 1 It is a circuit structure d...

AI Technical Summary

Problems solved by technology

Since WL selects one row at a time, in this row of cells, as long as the data stored in the first internal node A is "1", it will discharge the bit line BL_X (X=1, 2..., N-1). The number of units is large, so the loss of power consumption is very large

Images