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Packaging substrate and fabrication method thereof

By arranging an alignment layer between the metal pillars and the conductive blind holes of the packaging substrate, the problems of poor plating effect and complicated manufacturing steps caused by the large aspect ratio of the metal pillars in the existing technology are solved, and high-density wiring and component settings are achieved. , enhancing the overall yield and adhesion.

Active Publication Date: 2015-11-04
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the more manufacturing steps, the more accumulated manufacturing tolerances, in order to maintain the original area of ​​the second conductive portion 13, the range of the first sub-metal pillar 121 must be larger than the range of the second sub-metal pillar 122, so as to The first sub-metal pillar 121 provides sufficient alignment margin for the second sub-metal pillar 122; similarly, in order for the first conductive portion 11 to provide sufficient alignment margin for the first sub-metal pillar 121, the The range of the first conductive portion 11 must also be larger than the range of the first sub-metal pillar 121, which greatly increases the area of ​​the first conductive portion 11, thereby limiting the available wiring space.

Method used

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  • Packaging substrate and fabrication method thereof
  • Packaging substrate and fabrication method thereof
  • Packaging substrate and fabrication method thereof

Examples

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no. 1 example

[0046] Figure 3A to Figure 3N What is shown is a cross-sectional view of the first embodiment of the manufacturing method of the packaging substrate of the present invention.

[0047] like Figure 3A As shown, a first resistive layer 31 having a first opening 310 is formed on the top surface of a carrier board 30, and a first resisting layer 31 having an opposite first surface 32a and a second surface 32b is formed in the first opening 310. A conductive part 32 is used to connect the first conductive part 32 to the supporting board 30 through its first surface 32a, and the supporting board 30 can be a steel plate.

[0048] like Figure 3B As shown, a second resistive layer 33 with a second opening 330 is formed on the first resistive layer 31 and the first conductive portion 32, and the second resistive layer 33 of the first conductive portion 32 in the second opening 330 Metal posts 34 are formed on surface 32b.

[0049] like Figure 3C As shown, on the end surface of t...

no. 2 example

[0065] Figure 4A to Figure 4D What is shown is a cross-sectional view of the second embodiment of the manufacturing method of the packaging substrate of the present invention.

[0066] This embodiment is substantially similar to the previous embodiment, with the main differences described below.

[0067] like Figure 4A shown, which continues from Figure 3E , grinding the package body 37, so that the alignment layer 35 is embedded and flush with the fourth surface 37b.

[0068] like Figure 4B As shown, a dielectric material 45 is formed on the fourth surface 37 b and the alignment layer 35 , and the material of the dielectric material 45 can be polyimide or a molding compound.

[0069] like Figure 4C As shown, part of the dielectric material 45 is removed to form a blind hole 450 exposing part of the alignment layer 35 .

[0070] like Figure 4D As shown, a conductive blind hole 46 is formed in the blind hole 450 on the alignment layer 35, and a second conductive po...

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PUM

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Abstract

A fabrication method of a packaging substrate is provided, which includes the steps of: forming first conductive portions on a carrier; sequentially forming a conductive post and an alignment layer on each of the first conductive portions; forming an encapsulant on the carrier for encapsulating the first conductive portions, the conductive posts and the alignment layers; forming a conductive via on each of the alignment layers in the encapsulant and forming second conductive portions on the conductive vias and the encapsulant; and removing the carrier. Each of the first conductive portions and the corresponding conductive post, the alignment layer and the conductive via form a conductive structure. The alignment layer has a vertical projection area larger than those of the conductive post and the conductive via to thereby reduce the size of the conductive post and the conductive via, thus increasing the wiring density and the electronic element mounting density.

Description

technical field [0001] The invention relates to a packaging substrate and a manufacturing method thereof, in particular to a packaging substrate with electronic components and a manufacturing method thereof. Background technique [0002] like figure 1 As shown, the package substrate of the existing molded interconnection system (molded interconnection system, referred to as MIS) connects a plurality of first conductive parts 11 to a plurality of metal pillars 12, and connects the plurality of metal pillars 12 to a plurality of The second conductive part 13 is used to cover the first conductive part 11 and the metal pillar 12 with the package body 14; however, when the aspect ratio of the metal pillar 12 is too large, the effect of electroplating the metal pillar 12 is not good, but now The specification of the capacitor height is generally above 110 microns (μm). Therefore, if the capacitor is to be embedded in the aforementioned packaging substrate, the height of the metal...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488H01L21/48H10N97/00
CPCH05K1/186H01L28/40H05K1/115H05K3/10H01L23/49822H05K3/42H05K2201/10015H05K2203/0733H01L2924/0002H01L23/50H01L2924/00H10D1/68
Inventor 唐绍祖何祈庆蔡瀛洲
Owner SILICONWARE PRECISION IND CO LTD
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