RapidIO controller adopting window mapping mechanism and control method of RapidIO controller

Abstract

The invention provides a RapidIO controller adopting a window mapping mechanism. The controller comprises a RapidIO IP Core, a parallel local bus interacting with an external processor, an address decoding module, an expansion configuration space, an initiator request packet generating module, an initiator response packet analyzing module and an initiation bus request recording module, wherein the address decoding module decodes read-write operation chip selection on the parallel local bus to later-level accessed resources according to chip selection information of address spaces provided by configured register blocks in the expansion configuration space, the initiator request packet generating module is responsible for constructing request packets when a RapidIO bus request needs to be initiated, the initiator response packet analyzing module analyses a response packet received after the controller initiates the RapidIO bus request, the initiation bus request recording module records the RapidIO bus request which is initiated by the controller and needs the response packet. The RapidIO controller adopting the window mapping mechanism and a control method of the RapidIO controller are good in compatibility and complete in function.

Description

technical field [0001] The invention belongs to the field of embedded computing systems, in particular to a RapidIO controller adopting a window mapping mechanism and a control method thereof. Background technique [0002] With the continuous development of integrated avionics systems, on the one hand, the system has higher requirements for the rate and scale of data exchange and data transmission between various internal functional modules. The traditional parallel bus is due to the clock frequency and signal routing. On the other hand, due to the increasing scale of the system, based on the higher requirements for system fault tolerance and system network reconfiguration, the commonly used tree bus structure is no longer suitable for the entire system. architecture pattern. Based on such application requirements and development trends, the avionics system needs to introduce a new interconnection communication architecture to solve these problems. [0003] RapidIO technol...

AI Technical Summary

Problems solved by technology

But because the bridge chip usually only corresponds to one other standard bus, it cannot universally solve this problem for all types of processors, and not all processors can find a suitable bridge chip as a solution

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