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Method for optimizing memory in 8051 chip

A memory and chip technology, applied in the field of memory optimization in 8051 chips, can solve problems such as occupancy and multiple memory, achieve the effects of optimizing memory, optimizing memory space, and improving work efficiency

Inactive Publication Date: 2015-05-27
SHANGHAI HUAHONG INTEGRATED CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the depth of the function call is relatively long and each function uses memory, the overlay group will occupy more memory, which will cause a great burden on the 8051 chip with limited memory space

Method used

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  • Method for optimizing memory in 8051 chip

Examples

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Embodiment Construction

[0017] Below is an example of the present invention, demonstrates the usage of this invention by example. In this example, the c language under 8051 is used for explanation, combined with the drawings, the specific process is as follows:

[0018] The first step is to analyze the structure of the main function, find all the sub-functions called by this function, and calculate the memory usage in the sub-functions. Calculate the least common multiple of the sub-function with the largest memory usage and the memory consumption of the main function itself. Open up the memory space of this value size in the main function. If the sub-function calls other functions, use the sub-function as the main function, and use the method of the first step to calculate its memory usage.

[0019] The second step is to delete the memory space inside each sub-function.

[0020] The third step is to modify the interface of each sub-function, and allocate enough memory space for the sub-function t...

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Abstract

The invention discloses a method for optimizing a memory in an 8051 chip. The method includes the steps: firstly, developing a memory space shared by all sub functions and a main function in the main function; secondly, deleting memory spaces of the sub functions in the sub functions; thirdly, providing parameter interfaces in the sub functions, transmitting memory spaces provided by the main function, and enabling the memory spaces to serve as the memory spaces of the sub functions. The memory spaces of an 8051 procedure can be optimized, and the method solves the problem that the memory is insufficient as a lot of temporary variables are used in the procedure.

Description

technical field [0001] The invention relates to the field of 8051 chips, in particular to a method for optimizing memory in the 8051 chip. Background technique [0002] The memory allocation of the 8051 chip is different from that of a general PC (personal computer). First, the memory space is limited, and the memory space cannot be used arbitrarily; second, the allocation method is different. The temporary variables of the PC are generally allocated in the stack, while the 8051 chip uses overwriting and sharing. technique, whose temporary variables are allocated in an overlay group of memory. The coverage group is a data segment generated by the linker that can be covered. Temporary variables of data (data) type are allocated in _data_group_ (internal RAM coverage group), and temporary variables of type xdata (external extended RAM) are allocated in xdata_group (internal RAM Override Group). [0003] If a main function contains multiple sub-functions, these sub-functions ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445G06F12/02
Inventor 张伟马博
Owner SHANGHAI HUAHONG INTEGRATED CIRCUIT
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