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Multibus bus-to-ISA bus read-write operation switching circuit

A technology for reading and writing operations and converting circuits, which is applied in the field of reinforced computer design, can solve the problems of inability to achieve mixed insertion and compatibility, and achieve the effects of improving system testing capabilities, occupying less resources, and simple circuit structure

Active Publication Date: 2015-04-29
716TH RES INST OF CHINA SHIPBUILDING INDAL CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is no mature Multibus bus to ISA bus read and write operation conversion circuit in the prior art, and it is impossible to realize the mixed insertion and compatibility of ISA bus slave devices configured on the Multibus bus chassis

Method used

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  • Multibus bus-to-ISA bus read-write operation switching circuit
  • Multibus bus-to-ISA bus read-write operation switching circuit
  • Multibus bus-to-ISA bus read-write operation switching circuit

Examples

Experimental program
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Effect test

Embodiment Construction

[0025] combined with figure 1 , illustrate the composition of the multibus bus of the present invention to the composition of the read and write operation conversion circuit of ISA bus.

[0026] A read and write operation conversion circuit from a Multibus bus to an ISA bus of the present invention includes a clock frequency division and edge fetching circuit, a state transfer circuit, a sequence processing circuit, a reset circuit, and an interruption circuit; the clock frequency division and edge fetching circuit receives a system clock With the system reset signal, output the ISA bus clock edge signal to the state transfer circuit and timing processing circuit, and output the ISA bus clock to the ISA bus, the core part of the Multibus bus. Multibus three buses (control bus, address bus, data bus) and state transfer The circuit is connected to the timing processing circuit, the Multibus bus interrupt signal is connected to the interrupt circuit, the state transfer circuit ou...

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PUM

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Abstract

The invention discloses a Multibus bus-to-ISA bus read-write operation switching circuit. The Multibus bus-to-ISA bus read-write operation switching circuit switches the asynchronous read-write operation of the Multibus bus into the synchronous read-write operation of the ISA bus to realize the read-write operation of Multibus bus main equipment for ISA bus slave equipment. The Multibus bus-to-ISA bus read-write operation switching circuit is simple in structure and supports 8-bit and 16-bit data width, an address wire can be extended according to user requirements, and the address wire can be used for designing a hybrid bus computer system. The Multibus bus-to-ISA bus read-write operation switching circuit realizes mixed insertion and compatibility for configuring ISA bus slave equipment on a Multibus bus case and has broad application in the hybrid bus reinforced computer design field, computer bus board card test diagnosis field and the like.

Description

technical field [0001] The invention belongs to the field of reinforced computer design, in particular to a read and write operation conversion circuit from a Multibus bus to an ISA bus. Background technique [0002] PCI / CPCI, Multibus, and ISA are mainstream equipment buses for reinforced computers. Generally, computer systems use a single computer bus to form a series of designs, such as PCI bus computer, CPCI bus computer, Multibus bus computer, and ISA bus computer. The configuration modules generally include computer main modules. , AD module and 232 serial port module, special function module and other slave devices. In the design of reinforced computer, in order to improve the reliability of the system, it is hoped to use the identified mature modules or devices in the new system as much as possible, such as using the identified ISA bus slave modules (AD module, 232 serial port module, special function module) in the Multibus bus computer. modules, etc.) to form a mi...

Claims

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Application Information

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IPC IPC(8): G06F13/40
CPCG06F13/385G06F13/4068
Inventor 曲伟林冬冬张贝贝李臣郭潇湧陈国华葛佳佳管飞李红星马龙
Owner 716TH RES INST OF CHINA SHIPBUILDING INDAL CORP
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