Microprocessor micro system structure parameter optimization method based on Petri network

Abstract

The invention discloses a microprocessor micro system structure parameter optimization method based on a Petri network. The method comprises the following steps that a template of a flow line model is built on the basis of the colored Petri network, an instruction sequence of a target application program is obtained, relevant information between the instructions and the function unit types is obtained, a colored Petri network model, running under the current parameter configuration, of the target program is generated, a Petri network simulation tool is used for simulation, a simulation report is generated, the colored Petri network model is used for generating a corresponding directed acyclic graph according to the simulation report, a key path of the directed acyclic graph and nodes passed by the key path are calculated, the release time of each entering edge of each node is calculated, the performance bottle neck or power consumption bottle neck for running the target application program by the microprocessor in the current micro system structure parameter configuration is analyzed, and if the optimization is required, the micro system structure parameters are regulated. The microprocessor micro system structure parameter optimization method has the advantages that the prediction reliability and the precision are high, the searching design space relating range is wide, the optimization algorithm complexity is lower, and the optimization is fast and efficient.

Description

technical field [0001] The invention relates to a microprocessor performance bottleneck analysis and optimization method in the technical field of microprocessor design, in particular to a microprocessor microarchitecture parameter optimization method based on colored Petri nets. Background technique [0002] In the early stage of microprocessor design, the details of the microprocessor microarchitecture must first be determined, including: the number of pipeline stages, the number of registers between pipeline stations, and the number of key resources, such as reorder buffers (Reorder buffer) size, the size of the commit queue, etc., the number of execution units, delay, value width, emission width, in-order execution or out-of-order execution, etc. How to choose these parameters at the initial stage of design is very challenging work. The choice of parameters depends on the characteristics of the application that the processor is oriented to. It is necessary to conduct a ...

AI Technical Summary

Problems solved by technology

[0006] In summary, the following problems exist when performing design space exploration in the early stage of microprocessor design: 1) The simulation speed of existing clock-accurate architecture simulators is too slow, and it takes too long to run representative test programs to Simulate multiple parameter configurations in limited time, only a small fraction of the design space can be explored

2) The existing design space exploration method based on the prediction model has low prediction reliability and prediction accuracy, and although it is fast, it is difficult to produce credible results

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