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Semiconductor structure formation method

A semiconductor and gate structure technology, applied in the field of semiconductor structure formation, to achieve the effect of simple process steps and improved fin quality

Active Publication Date: 2015-02-11
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The performance of the fin field effect transistor formed by the prior art needs to be further improved

Method used

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  • Semiconductor structure formation method
  • Semiconductor structure formation method
  • Semiconductor structure formation method

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Experimental program
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Embodiment Construction

[0030] As mentioned in the background art, the performance of the fin field effect transistor formed in the prior art needs to be further improved.

[0031] Research has found that in the prior art, the method of etching the semiconductor substrate is generally used to form the fins of the fin field effect transistors. Since the ratio of the height to the width of the fins is large, when the requirements for the width of the fins are relatively low, In the process of forming the fin structure by etching, the collapse or distortion of the fin is easy to occur, thereby affecting the performance of the fin field effect transistor formed on the fin.

[0032] In this embodiment, an epitaxial process is used to form a fin with a wide bottom and a narrow top. The fin is not easy to collapse and can effectively improve the performance of the formed fin field effect transistor.

[0033] In order to make the above objects, features and advantages of the present invention more comprehens...

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Abstract

The invention relates to a semiconductor structure formation method. The semiconductor structure formation method comprises steps that a semiconductor substrate is provided; a dielectric layer is formed at the surface of the substrate; a through hole is formed in the dielectric layer, width of the bottom portion of the through hole is greater than that of the top portion, and a partial surface of the semiconductor substrate is exposed by the through hole, a fin portion is formed in the through hole to fill the through holes, the surface of the fin portion is level with the surface of the dielectric layer; the dielectric layer is etched, and the surface of the dielectric layer after etching is lower than the top portion surface of the fin portion. The semiconductor structure formation method can improve quality of the formed fin portion, and thereby performance of a transistor is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a semiconductor structure. Background technique [0002] With the continuous development of semiconductor process technology, the process node is gradually reduced, and the gate-last (gate-last) process has been widely used to obtain an ideal threshold voltage and improve device performance. However, when the feature size of the device is further reduced, even if the gate-last process is adopted, the structure of the conventional MOS field effect transistor can no longer meet the requirements for device performance. Multi-gate devices have attracted widespread attention as a substitute for conventional devices. [0003] Fin field effect transistor is a common multi-gate device, figure 1 A schematic diagram of a three-dimensional structure of a fin field effect transistor in the prior art is shown. Such as figure 1 As shown, it includes: a semiconduc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
CPCH01L29/66795
Inventor 何其暘张翼英童浩
Owner SEMICON MFG INT (SHANGHAI) CORP
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