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Server memory signal detection design method

A signal detection and server technology, which is applied in the field of computer communication, can solve problems such as the inability to detect weak links in memory signal design

Inactive Publication Date: 2015-01-07
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Description
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AI Technical Summary

Problems solved by technology

[0005] The present invention is based on the theoretical support of the signal eye diagram, and specifically uses a server memory signal detection design method to solve the problem that currently in the process of server main board memory signal detection, the detection method of memory trial only relying on manual operation application software cannot detect The weak link problem of memory signal design

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  • Server memory signal detection design method

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Embodiment Construction

[0018] The content of the present invention is described in more detail below:

[0019] ①Use the full coverage memory physical address area read and write test, select memory sticks without quality problems, fully configure the selected memory sticks without quality problems on the motherboard to be tested, and select the memory frequency as 2133MHZ.

[0020] ② Connect the power supply chip of the memory power supply VDD on the motherboard to the CPU through the I2C bus. After the system is turned on, the CPU sets the initial memory power supply VDD voltage value to 1.5 volts through the I2C bus.

[0021] ③ Connect each memory stick fully inserted on the motherboard to the CPU through the SMBUS bus. After the system is turned on, the CPU reads the SPD EEPROM information of the memory stick through the SMBUS bus to obtain the memory capacity, voltage preset value, read and write time, etc. Key Information.

[0022] ④After the system is turned on, the CPU, as the main control ...

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Abstract

The invention discloses a server memory signal detection design method and relates to the field of computer communication. The server memory signal detection design method includes that distributing a memory bank without quality problem for a main board to be detected, wherein the memory bank has the maximum frequency and capacity capable of being supported by the main board; connecting a power supply chip of a memory power supply VDD on the main board with a CPU through an I2C bus; after starting the system, enabling the CPU to set the initial voltage value of the memory power supply VDD through the I2C bus; connecting each memory bank inserted in the main board with the CPU through an SMBUS bus, wherein after starting the system, the CPU servers as the main control end for memory signals, the CPU uses different data packet sending modes to enter signal connectivity test and inter-symbol interference test between signals, and the CPU uses a read-in data and read data comparison mode; regulating the power supply voltage and memory frequency of the memory, and continuously reading in and reading memory random data under the system so as to obtain the data reading and reading-in stability under voltage undulation and the data reading and reading-in stability under different memory frequencies.

Description

technical field [0001] The present invention relates to the field of computer communication, and specifically uses a design method for server memory signal detection to solve the problem that the memory signal cannot be detected by only relying on manual operation application software to realize the memory trial detection method in the current process of server motherboard memory signal detection The problem of the weak link of the design. Background technique [0002] There are more and more types and quantities of memory sticks used in today's servers. At present, the number of common server boards ranges from 6 to 48 memory sticks, and correspondingly 6-48 memory sticks are placed on the motherboard. At the same time, 240 memory sticks must be Signals need to be delivered equally to all memory slots. At present, for the design of high-speed memory signal routing, the layout routing of the high-speed signal of the server motherboard memory needs to undergo strict simulati...

Claims

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Application Information

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IPC IPC(8): G06F11/22
Inventor 刘涛
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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