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High-density stackable packaging structure and manufacturing method

A technology of packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of precision deviation, affecting the placement yield, and sliding of the upper sphere, and achieves improved reliability and denser Excellent performance, avoid short circuit effect

Active Publication Date: 2017-02-01
江阴芯智联电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] 1. The electrical connection copper pillars on the bottom substrate are limited by height and diameter in terms of electroplating manufacturing process, so high-density design and manufacture cannot be achieved;
[0005] 2. The bottom package and the top package are interconnected through the metal solder balls on the outer legs of the top package. After reflow soldering, the metal solder balls will be thermally deformed, and the distance between the solder balls of the top package will be smaller than before reflow soldering. The short circuit, so the package stack with the top package as Fine Pitch (fine pitch) cannot be used;
[0006] 3. If the substrate package is stacked to reduce the ball pitch by stacking multiple small metal tin balls for interconnection, it will be difficult to align during the mounting and stacking process, which will easily cause accuracy deviation or the upper ball will slip, resulting in an open circuit or short circuit affecting the placement. Yield

Method used

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  • High-density stackable packaging structure and manufacturing method

Examples

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Embodiment Construction

[0047] see Figure 10 , a high-density stackable packaging structure of the present invention, which includes a metal lead frame or substrate 5, a chip 3 is mounted on the front side of the metal lead frame or substrate 5, copper pillars 2 are arranged around the chip 3, and the copper The top of the column 2 is provided with a tin column 4, and the peripheral area of ​​the copper column 2, the chip 3 and the tin column 4 is encapsulated with a plastic encapsulant 1, the height of the plastic encapsulant 1 exceeds the height of the tin column 4, and the top of the tin column 4 The area is provided with mounting holes 6 .

[0048] Its production method is as follows:

[0049] Step 1. Take the metal lead frame or the surface of the substrate and paste the photoresist film

[0050] see figure 1 , take a piece of metal lead frame or substrate with appropriate thickness, and paste a photoresist film that can be exposed and developed on the front and back respectively, and the p...

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PUM

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Abstract

The invention relates to a novel high-density stackable packaging structure and a manufacturing method thereof. The packaging structure comprises a metal lead frame and a substrate (5). A chip (3) is stuck to the front face of the metal lead frame or the substrate (5). Copper columns (2) are arranged on the periphery of the chip (3), tin columns (4) are arranged on the tops of the copper columns (2), the peripheries of the copper columns (2), the chip (3) and the tin columns (4) are coated with molding compounds (1) which are higher than the tin columns (4), and installation holes (6) are formed in the tops of the tin columns (4). The novel light-density stackable packaging structure and the manufacturing method of the novel high-density stackable packaging structure have the advantages that substrate design and manufacturing precision is improved in an electroplating and laser drilling combined mode, fine pitch packaging body stacking can be achieved, and packaging body safety and reliability are improved.

Description

technical field [0001] The invention relates to a high-density stackable packaging structure and a manufacturing method, belonging to the technical field of semiconductor packaging. Background technique [0002] The current PoP encapsulation form is as follows: Figure 12 As shown, the manufacturing process is mainly to stack the top-layer substrate package on the bottom logic substrate, and use the metal copper pillars on the bottom substrate to realize the stacking and electrical interconnection of the two packages through the mounting and reflow soldering of solder balls. [0003] The above PoP (Package on Package) packaging structure has the following disadvantages: [0004] 1. The electrical connection copper pillars on the bottom substrate are limited by height and diameter in terms of electroplating manufacturing process, so high-density design and manufacture cannot be achieved; [0005] 2. The bottom package and the top package are interconnected through the metal ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/00H01L23/52H01L21/50H01L21/06
CPCH01L24/97H01L2224/16225H01L2924/15311H01L2924/181
Inventor 陈灵芝郁科锋
Owner 江阴芯智联电子科技有限公司
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