Semiconductor package with passive devices and stacking method thereof
A passive device and semiconductor technology, applied in the fields of semiconductor device, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., which can solve problems such as large size, long distance between controller and storage device, and unfavorable signal quality.
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Embodiment 1
[0025] image 3 is a stacked structure of semiconductor packages 170 according to an exemplary embodiment of the present invention. The following will refer to image 3 Exemplary embodiments of the present invention will be described.
[0026] refer to image 3 , the semiconductor package 170 of the exemplary embodiment of the present invention includes: a substrate 110; a first chip 120 disposed on the substrate 110, and the upper surface of the first chip 120 is electrically connected to the substrate 110 by using a bonding wire 150; Chip 130, arranged on the first chip 120, using the bonding wire 150 to electrically connect the upper surface of the second chip 130 to the substrate 110; controller 140, the controller 140 and the first chip 120 are alternately arranged on the first chip 120 On, one end of the controller 140 is electrically connected to the substrate 110 through the connecting post 191 and the bump 192, and the other end is connected to the first chip 120 t...
Embodiment 2
[0040] Next, a method of stacking semiconductor packages with passive devices according to an exemplary embodiment of the present invention will be described with reference to Embodiment 2. Referring to FIG.
[0041] First, the substrate 110 is prepared.
[0042] Next, the first chip 120 is placed on the substrate 110 by using solder balls or conductive adhesive, wherein the first chip 120 occupies a part of the substrate 110, and the upper surface of the first chip 120 is electrically connected to the substrate 110 by bonding wires 150. Substrate 11. Subsequently, the second chip 130 is disposed on the first chip 120 in the same manner, and the upper surface of the second chip 130 is electrically connected to the substrate 110 by the bonding wire 150 .
[0043] The controller 140 is arranged above the part of the substrate 110 where the first chip 120 is not arranged, so that the controller 140 and the first chip 120 are alternately arranged above the first chip 120, and one...
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