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KLEIN encryption implementation method based on area and performance balanced optimization

An implementation method and performance technology, which is applied in the field of cryptographic algorithms, can solve the problems of low operating frequency and implementation speed, and achieve the effects of faster encryption speed, better effect, and significantly improved encryption efficiency

Active Publication Date: 2014-03-26
HENGYANG NORMAL UNIV
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Problems solved by technology

[0010] The traditional parallel implementation of encryption algorithms often uses local synchronous clock pulse triggering, which increases trigger and wiring resources for the overall structure, and the system operating frequency and implementation speed are relatively low

Method used

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  • KLEIN encryption implementation method based on area and performance balanced optimization
  • KLEIN encryption implementation method based on area and performance balanced optimization
  • KLEIN encryption implementation method based on area and performance balanced optimization

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Embodiment Construction

[0053] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0054] Without loss of generality, the present invention will be described by taking KLEIN with a key length of 64 bits as an example.

[0055] combine figure 1 with figure 2 Comparing the algorithm flow chart of the algorithm, we can see the rationality of the algorithm hardware implementation design after using the optimization technology. In the algorithm, the continuous assignment statement in Verilog HDL language is used to realize parallel execution, and the global synchronous clock pulse trigger method is adopted and all basic sub-modules are integrated into one module.

[0056] A KLEIN encryption implementation method based on area and performance balance optimization, including the following steps:

[0057] Step 1: Load the data to be encrypted into the register;

[0058] Step 2: Perform n rounds of calculation operations on the output of ...

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Abstract

The invention discloses a KLEIN encryption implementation method based on area and performance balanced optimization. The method includes: optimizing an S box, allowing two modules to share the S box, building a Tab box for fast table look-up, allowing key expansion round constant i to be in a self-adding manner, encapsulating and integrating round key adding, byte substitution, row shifting, line mixing, and key expansion sub-modules into one module, using continuous assignment statement to realize algorithm assignment, updating a clock signal control counter, using Verilog HDL (hardware description language) parallel execution features and the manner integrating the sub-modules into one module, using global synchronization clock pulse triggering, and fully utilizing the device trigger and wiring resources. By the method, the area resource occupation required by implementing the KLEIN encryption algorithm can be saved effectively, encryption speed is increased, and the KLEIN encryption algorithm can be implemented with low hardware area and keep high performance.

Description

technical field [0001] The invention relates to the field of cryptographic algorithms in information security technology, in particular to a KLEIN encryption implementation method based on area and performance balance optimization. Background technique [0002] With the development of wireless communication and embedded systems, we rely more and more on ubiquitous computing, and pay more attention to the efficient implementation and application of encryption algorithms in the resource-constrained Internet of Things. KLEIN is a lightweight block cipher algorithm proposed by Chinese scholar Gong Zheng at the RFIDSEC2011 conference. The group length of KLEIN algorithm is 64 bits, and it supports three key lengths of 64 / 80 / 96 bits, corresponding to 12 / 16 / 20 rounds of encryption respectively. The KLEIN algorithm is a SP network structure macroscopically, and is divided into five modules microscopically: round key addition (AddRoundKey), byte replacement (SubBytes), row shift tra...

Claims

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Application Information

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IPC IPC(8): H04L9/06
Inventor 李浪刘波涛焦铬
Owner HENGYANG NORMAL UNIV
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