Efficient secure chip power consumption attack test method

Abstract

The invention discloses an efficient secure chip power consumption attack test method. When a power consumption attack test is carried out on a secure chip in a design stage, the obtaining and processing method of a power consumption sample includes the steps of (1) obtaining the power consumption sample, (2) pre-processing the power consumption sample, (3) obtaining an assumed power consumption sample, and (4) calculating correlation coefficients and analyzing an attack result. According to the method, only power consumption points which change are sampled, large quantities of power consumption sample data are saved, the power consumption attack calculated amount is substantially reduced, and the method has the advantages of being high in evaluation efficiency and speed. More importantly, the power consumption attack test can be carried out in the design stage of the chip, the risk that the chip is designed again due to the fact that the safety performance of the chip produced in a stream line is not good is reduced and accordingly the design cycle of the secure chip is shortened.

Description

technical field [0001] The invention relates to the field of chip information security, in particular to an efficient power consumption attack testing method for a secure chip. Background technique [0002] Entering the 21st century, with the rapid development of science and technology, social informatization has become the general trend, life has become informatized, digitized and networked, and people's dependence on information is constantly increasing. With the development of computer, network, communication technology and integrated circuit technology, security chips are widely used in bank cards of automatic teller machines (Automatic Teller Machine, ATM), smart cards of access control systems in residential or corporate environments, and voice encryption chips in mobile phones. And other environments that require information security. Because the circuit structure inside the integrated circuit is very complex, and it has the characteristics of good sealing, not easy ...

AI Technical Summary

Problems solved by technology

Some scholars use the simulation attack method designed by mathematical modeling. Although the attack is efficient and the cost is low, its accuracy is very low, the reliability of the result is not high, and it is not suitable for verifying the anti-power analysis characteristics of the security chip.

[0006] To sum up, in the prior art, the power consumption attack method for chips implemented by FPGA and ASIC has the defects of high cost, difficult implementation, and long verification cycle. The simulation attack method designed by mathematical modeling has low precision and can The defect of poor reliability

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