Non-volatile memory device with clustered memory cells

Abstract

An embodiment of a non-volatile memory device includes: a memory array, having a plurality of non-volatile logic memory cells arranged in at least one logic row, the logic row including a first row and a second row sharing a common control line; and a plurality of bit lines. Each logic memory cell has a direct memory cell, for storing a logic value, and a complementary memory cell, for storing a second logic value, which is complementary to the first logic value in the corresponding direct memory cell. The direct memory cell and the complementary memory cell of each logic memory cell are coupled to respective separate bit lines and are placed one in the first row and the other in the second row of the respective logic row.

Description

technical field [0001] The present invention relates to non-volatile memory devices having clustered memory cells. Background technique [0002] It is well known that several integrated electronic devices require a certain amount of non-volatile memory. Non-volatile memory may conventionally be used in a stand-alone memory board or card that is separate from the chip that integrates the control and processing functions of the device. However, in some cases it is desirable to provide the processing unit with an embedded non-volatile memory integrated in the same chip. [0003] In conventional stand-alone nonvolatile memory devices, the structure of the memory cells is not easily integrated in the CMOS fabrication process widely used to fabricate processing and control components. Especially for standard CMOS process flows, floating gate cells usually require an additional polysilicon layer. Therefore, the integration of nonvolatile memory cells in standard CMOS processes w...

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