Through-silicon-via etching method

A through-silicon via and etching technology, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of easy leakage and poor quality of through-silicon via interconnection structure, and achieve the effect of improving efficiency

Inactive Publication Date: 2013-11-13
ADVANCED MICRO FAB EQUIP INC CHINA
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Problems solved by technology

[0004] However, the main technical difficulty faced by the through-silicon via interconnection structure lies in the need to etch via holes with a relatively high aspect ratio (Aspect Ratio) and control the profile of via holes with a high aspect ratio. The quality of TSV interconnect structure is poor, and it is prone to leakage

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Embodiment Construction

[0023] Research has been carried out on TSV products with serious leakage phenomena. After analyzing the cross-section of the TSV formed by the prior art with a scanning electron microscope, it is found that the morphology of the TSV formed by the existing process is as follows: figure 1 Shown is scalloped, serrated or corrugated to a greater degree, with higher roughness. Form an insulating layer on the surface of a shell-shaped, jagged or corrugated through-hole with high roughness, and then fill it with a conductive substance. The uniformity of the insulating layer is difficult to control, so that the conductive substance along the thinner position of the insulating layer Diffusion into the wafer, resulting in serious leakage of TSV products.

[0024] After further research on the process of forming the through-silicon vias, it was found that the reason for the formation of the surface of the above-mentioned corrugated through-holes is that in the formation process of the t...

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Abstract

A through-silicone-via etching method comprises steps as follows: providing a to-be-etched silicon substrate; etching the silicon substrate through first etching to form an opening; forming protecting layers on the side wall and the bottom of the opening through passivation deposition; etching the bottom of the opening through second etching, wherein the pressure of an etching chamber of the second etching is smaller than that of etching chambers of the first etching and the passivation deposition; and treating the silicon substrate sequentially and circularly through the first etching, the passivation deposition and the second etching until a through-silicone-via is formed. The roughness of the side wall of the formed through-silicone-via is low.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a through-silicon hole etching method. Background technique [0002] Through-Silicon Via (TSV, Through-Silicon-Via) interconnection structure is the latest technology to realize the interconnection between chips by making vertical conduction between chips and between wafers. Unlike previous IC package bonding and overlay technologies using bumps, the through-silicon via interconnect structure can maximize the density of chips stacked in three dimensions, minimize the size of the chip, and greatly improve the performance of chip speed and low power consumption. [0003] The method for forming the existing TSV interconnection structure can refer to the Chinese patent with the publication number CN101483150A, which includes the following steps: step S11, etching the through hole on the surface of the wafer; step S12, forming an insulating layer on the surface and bottom of...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768
Inventor 严利均黄秋平刘翔宇
Owner ADVANCED MICRO FAB EQUIP INC CHINA
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