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Method for forming etch stop layer and copper interconnection

A technology of stop layer and copper interconnection, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problem of poor adhesion between silicon nitride carbide and copper interconnection, easy diffusion of copper, and reduction of copper activation energy, etc. Problems, achieve the effect of improving voltage breakdown performance, improving adhesion, and good voltage breakdown performance

Active Publication Date: 2015-11-25
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, silicon carbide nitride is easy to react with copper interconnected copper to form copper nitride. Copper nitride reduces the activation energy of copper, which leads to the easy diffusion of copper interconnected copper, and the adhesion between silicon carbide nitride and copper interconnect becomes poor. , prone to peeling in subsequent process steps

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  • Method for forming etch stop layer and copper interconnection
  • Method for forming etch stop layer and copper interconnection
  • Method for forming etch stop layer and copper interconnection

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Embodiment Construction

[0055] The present invention will be described in further detail below in conjunction with accompanying drawing:

[0056] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0057] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, and it should not be limited here. The protection scope of ...

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Abstract

The invention relates to a forming method of an etching stop layer. The forming method of the etching stop layer is as follows: a semiconductor substrate is provided; a silicon carbide pre-stop layer is deposited on the semiconductor substrate, and a nitrogen silicon carbide main-stop layer is deposited on the silicon carbide pre-stop layer. The invention further relates to a forming method of copper-connection. The forming method of the copper-connection is as follows: a semiconductor substrate is provided, and a copper electricity conducting layer is formed in the semiconductor substrate; the semiconductor substrate is annealed through hydrogen; the semiconductor substrate is pre-processed through plasmas of hydrogen and helium; the semiconductor substrate is pre-processed through silane; a silicon carbide pre-stop layer is deposited on the semiconductor substrate, and a nitrogen silicon carbide main-stop layer is deposited on the silicon carbide pre-stop layer; a medium layer is deposited on the nitrogen silicon carbide main-stop layer; a through hole or a groove which penetrates through the medium layer, the nitrogen silicon carbide main-stop layer and the silicon carbide pre-stop layer is formed; the through hole or the groove is filled so as to form the copper-connection. Due to the fact the silicon carbide pre-stop layer is capable of reducing copper diffusion, forming of CuNX can be prevented, and the adhesion property of the etching stop layer and the copper-connection is improved at the same time.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for forming an etching stop layer and copper interconnection. Background technique [0002] With the decreasing line width of the semiconductor process, in order to reduce the capacitance and resistance delay (RCdelay) of the interconnection, copper metal is selected as the interconnection material, and a low dielectric constant material is selected as the dielectric layer accordingly, and due to the unique characteristics of copper Features that are difficult to etch, introduce damascene and dual damascene processes. The manufacturing method of the copper interconnection of prior art is as follows: as Figure 1a As shown, an etch stop layer 101 and a dielectric layer 102 are sequentially deposited on a substrate 100, as Figure 1b As shown, via holes and / or trenches 103 are formed through the dielectric layer 102 and the etch stop layer 101, such as Figure 1c As shown, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/311H01L21/768
Inventor 周鸣
Owner SEMICON MFG INT (SHANGHAI) CORP
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