MOS device and manufacturing method
A technology of MOS devices and manufacturing methods, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as large parasitic capacitance, and achieve the effects of reducing parasitic capacitance, reducing costs, and reducing short-channel effects
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[0038] Such as figure 2 Shown is a schematic structural diagram of a MOS device according to an embodiment of the present invention. The MOS device in the embodiment of the present invention is formed on a silicon substrate, the active region is isolated by the shallow trench field oxygen 2 , and a well region 1 of the second conductivity type is formed in the entire active region.
[0039] The gate is composed of a gate silicon oxide layer 3 and a gate polysilicon layer 4 sequentially formed on the active region, and a side wall 13 is formed on the side wall of the gate. The thickness of the gate silicon oxide layer 3 is 20-100 angstroms; the thickness of the gate polysilicon layer 4 is 1500-2000 angstroms. The composition of the side wall 13 is an oxide film, or a composite film of a nitride film and an oxide film. The well region 1 covered by the gate is a channel region.
[0040] The source and drain regions are formed on both sides of the gate and include a source and...
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