Structure and method of fpga chip online upgrade based on data frame asynchronous transmission protocol
A technology of asynchronous transmission and data frame, applied in electrical digital data processing, instruments, program control devices, etc., can solve the problems of inability to upgrade software and hardware, complicated and difficult to implement the program of updating chips, etc., to achieve stable and reliable performance and application scope Extensive, fast-running effects
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[0081] In order to understand the technical content of the present invention more clearly, the following examples are given in detail.
[0082] see Figure 1 to Figure 7 As shown, the circuit structure based on the data frame asynchronous transmission protocol to realize the online upgrade of the FPGA chip includes a control card, a main terminal board and several slave terminal boards, and the control card, the main terminal board and each slave terminal board all carry FPGA chip and corresponding Flash memory are arranged, and described control card is connected with external computer, and described control card, master terminal board and several slave terminal boards are serially connected successively, wherein, described control card carries The host interface and the slave interface, the main terminal board carries the main terminal board host interface and the main terminal board slave interface, and each of the slave terminal boards carries its own slave terminal board ...
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